ENC28J60
REGISTER 3-6:
PHSTAT2: PHYSICAL LAYER STATUS REGISTER 2
U-0
—
U-0
—
R-0
R-0
R-0
R-0
R-x
DPXSTAT(1)
U-0
—
TXSTAT
RXSTAT
COLSTAT
LSTAT
bit 15
bit 8
bit 0
U-0
—
U-0
—
R-0
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
PLRITY
bit 7
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 15-14
bit 13
Unimplemented: Read as ‘0’
TXSTAT: PHY Transmit Status bit
1= PHY is transmitting data
0= PHY is not transmitting data
bit 12
bit 11
bit 10
bit 9
RXSTAT: PHY Receive Status bit
1= PHY is receiving data
0= PHY is not receiving data
COLSTAT: PHY Collision Status bit
1= A collision is occuring
0= A collision is not occuring
LSTAT: PHY Link Status bit (non-latching)
1= Link is up
0= Link is down
DPXSTAT: PHY Duplex Status bit(1)
1= PHY is configured for full-duplex operation (PHCON1<8> is set)
0= PHY is configured for half-duplex operation (PHCON1<8> is clear)
bit 8-6
bit 5
Unimplemented: Read as ‘0’
PLRITY: Polarity Status bit
1= The polarity of the signal on TPIN+/TPIN- is reversed
0= The polarity of the signal on TPIN+/TPIN- is correct
bit 4-0
Unimplemented: Read as ‘0’
Note 1: Reset values of the Duplex mode/status bit depends on the connection of the LED to the LEDB pin (see
Section 2.6 “LED Configuration” for additional details).
DS39662B-page 24
Preliminary
© 2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
