ATmega48/88/168
Figure 8-2. MCU Start-up, RESET Tied to VCC
VPOT
VCC
VRST
RESET
tTOUT
TIME-OUT
INTERNAL
RESET
Figure 8-3. MCU Start-up, RESET Extended Externally
VPOT
VCC
VRST
RESET
tTOUT
TIME-OUT
INTERNAL
RESET
8.0.4
External Reset
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see Table 8-1) will generate a reset, even if the clock is not running.
Shorter pulses are not guaranteed to generate a reset. When the applied signal reaches the
Reset Threshold Voltage – VRST – on its positive edge, the delay counter starts the MCU after
the Time-out period – tTOUT – has expired. The External Reset can be disabled by the RSTDISBL
fuse, see Table 25-6 on page 282.
Figure 8-4. External Reset During Operation
CC
45
2545E–AVR–02/05