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ATMEGA48V-10MUR 参数 Datasheet PDF下载

ATMEGA48V-10MUR图片预览
型号: ATMEGA48V-10MUR
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 4KB FLASH 32VQFN]
分类和应用: 时钟微控制器外围集成电路闪存
文件页数/大小: 359 页 / 2546 K
品牌: MICROCHIP [ MICROCHIP ]
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ATmega48/88/168  
8.2  
Watchdog Timer  
ATmega48/88/168 has an Enhanced Watchdog Timer (WDT). The main features are:  
Clocked from separate On-chip Oscillator  
3 Operating modes  
– Interrupt  
– System Reset  
– Interrupt and System Reset  
Selectable Time-out period from 16ms to 8s  
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode  
Figure 8-7. Watchdog Timer  
128kHz  
OSCILLATOR  
WDP0  
WDP1  
WATCHDOG  
WDP2  
RESET  
WDP3  
WDE  
MCU RESET  
WDIF  
WDIE  
INTERRUPT  
The Watchdog Timer (WDT) is a timer counting cycles of a separate on-chip 128 kHz oscillator.  
The WDT gives an interrupt or a system reset when the counter reaches a given time-out value.  
In normal operation mode, it is required that the system uses the WDR - Watchdog Timer Reset  
- instruction to restart the counter before the time-out value is reached. If the system doesn't  
restart the counter, an interrupt or system reset will be issued.  
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used  
to wake the device from sleep-modes, and also as a general system timer. One example is to  
limit the maximum time allowed for certain operations, giving an interrupt when the operation  
has run longer than expected. In System Reset mode, the WDT gives a reset when the timer  
expires. This is typically used to prevent system hang-up in case of runaway code. The third  
mode, Interrupt and System Reset mode, combines the other two modes by first giving an inter-  
rupt and then switch to System Reset mode. This mode will for instance allow a safe shutdown  
by saving critical parameters before a system reset.  
The Watchdog always on (WDTON) fuse, if programmed, will force the Watchdog Timer to Sys-  
tem Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Interrupt  
mode bit (WDIE) are locked to 1 and 0 respectively. To further ensure program security, alter-  
ations to the Watchdog set-up must follow timed sequences. The sequence for clearing WDE  
and changing time-out configuration is as follows:  
49  
2545E–AVR–02/05  
 
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