ATmega48/88/168
5. AVR ATmega48/88/168 Memories
This section describes the different memories in the ATmega48/88/168. The AVR architecture
has two main memory spaces, the Data Memory and the Program Memory space. In addition,
the ATmega48/88/168 features an EEPROM Memory for data storage. All three memory spaces
are linear and regular.
5.1
In-System Reprogrammable Flash Program Memory
The ATmega48/88/168 contains 4/8/16K bytes On-chip In-System Reprogrammable Flash
memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga-
nized as 2/4/8K x 16. For software security, the Flash Program memory space is divided into two
sections, Boot Loader Section and Application Program Section in ATmega88 and ATmega168.
ATmega48 does not have separate Boot Loader and Application Program sections, and the
SPM instruction can be executed from the entire Flash. See SELFPRGEN description in section
”Store Program Memory Control and Status Register – SPMCSR” on page 259 and page 269for
more details.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega48/88/168 Program Counter (PC) is 11/12/13 bits wide, thus addressing the 2/4/8K pro-
gram memory locations. The operation of Boot Program section and associated Boot Lock bits
for software protection are described in detail in ”Self-Programming the Flash, ATmega48” on
page 256 and ”Boot Loader Support – Read-While-Write Self-Programming, ATmega88 and
ATmega168” on page 264. ”Memory Programming” on page 280 contains a detailed description
on Flash Programming in SPI- or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in ”Instruction Execution Tim-
ing” on page 12.
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2545E–AVR–02/05
MICROCHIP [ MICROCHIP ]
