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ATMEGA48V-10MUR 参数 Datasheet PDF下载

ATMEGA48V-10MUR图片预览
型号: ATMEGA48V-10MUR
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 4KB FLASH 32VQFN]
分类和应用: 时钟微控制器外围集成电路闪存
文件页数/大小: 359 页 / 2546 K
品牌: MICROCHIP [ MICROCHIP ]
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ATmega48/88/168  
4.5.1  
The X-register, Y-register, and Z-register  
The registers R26..R31 have some added functions to their general purpose usage. These reg-  
isters are 16-bit address pointers for indirect addressing of the data space. The three indirect  
address registers X, Y, and Z are defined as described in Figure 4-3.  
Figure 4-3. The X-, Y-, and Z-registers  
15  
XH  
XL  
0
0
X-register  
7
0
0
7
R27 (0x1B)  
R26 (0x1A)  
15  
YH  
YL  
ZL  
0
0
Y-register  
Z-register  
7
7
R29 (0x1D)  
R28 (0x1C)  
15  
ZH  
0
0
7
7
0
R31 (0x1F)  
R30 (0x1E)  
In the different addressing modes these address registers have functions as fixed displacement,  
automatic increment, and automatic decrement (see the instruction set reference for details).  
4.6  
Stack Pointer  
The Stack is mainly used for storing temporary data, for storing local variables and for storing  
return addresses after interrupts and subroutine calls. The Stack Pointer Register always points  
to the top of the Stack. Note that the Stack is implemented as growing from higher memory loca-  
tions to lower memory locations. This implies that a Stack PUSH command decreases the Stack  
Pointer.  
The Stack Pointer points to the data SRAM Stack area where the Subroutine and Interrupt  
Stacks are located. This Stack space in the data SRAM must be defined by the program before  
any subroutine calls are executed or interrupts are enabled. The Stack Pointer must be set to  
point above 0x0100, preferably RAMEND. The Stack Pointer is decremented by one when data  
is pushed onto the Stack with the PUSH instruction, and it is decremented by two when the  
return address is pushed onto the Stack with subroutine call or interrupt. The Stack Pointer is  
incremented by one when data is popped from the Stack with the POP instruction, and it is incre-  
mented by two when data is popped from the Stack with return from subroutine RET or return  
from interrupt RETI.  
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of  
bits actually used is implementation dependent. Note that the data space in some implementa-  
tions of the AVR architecture is so small that only SPL is needed. In this case, the SPH Register  
will not be present.  
Bit  
15  
SP15  
SP7  
14  
SP14  
SP6  
13  
SP13  
SP5  
12  
SP12  
SP4  
11  
SP11  
SP3  
10  
SP10  
SP2  
9
SP9  
8
SP8  
SPH  
SPL  
SP1  
SP0  
7
6
5
4
3
2
1
0
Read/Write  
Initial Value  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
RAMEND  
11  
2545E–AVR–02/05