• ADC2/ACMP2/PCINT21 – Bit 5
ADC2, analog to digital converter, input channel 2.
ACMP2, analog comparator 1 positive input. Configure the port pin as input with the internal pull-up switched off to avoid the
digital port function from interfering with the function of the analog comparator.
PCINT21, pin change interrupt 21.
• PCINT20/ADC1/RXD/RXLIN/ICP1/SCK_A – Bit 4
ADC1, analog to digital converter, input channel 1.
RXD/RXLIN, LIN/UART receive pin. Receive data (data input pin for the LIN/UART). When the LIN/UART receiver is
enabled this pin is configured as an input regardless of the value of DDRD4. When the UART forces this pin to be an input,
a logical one in PORTD4 will turn on the internal pull-up.
ICP1, input capture pin1: This pin can act as an input capture pin for Timer/Counter1.
SCK_A: Master clock output, slave clock input pin for SPI channel. When the SPI is enabled as a slave, this pin is configured
as an input regardless of the setting of DDD4. When the SPI is enabled as a master, the data direction of this pin is
controlled by DDD4. When the pin is forced to be an input, the pull-up can still be controlled by the PORTD4 bit.
PCINT20, pin change interrupt 20.
• PCINT19/TXD/TXLIN/OC0A/SS/MOSI_A, Bit 3
TXD/TXLIN, LIN/UART transmit pin. Data output pin for the LIN/UART. When the LIN/UART Transmitter is enabled, this pin
is configured as an output regardless of the value of DDD3.
OC0A, output compare match A output: This pin can serve as an external output for the Timer/Counter0 output compare A.
The pin has to be configured as an output (DDD3 set “one”) to serve this function. The OC0A pin is also the output pin for the
PWM mode
SS: Slave port select input. When the SPI is enabled as a slave, this pin is configured as an input regardless of the setting of
DDD3. As a slave, the SPI is activated when this pin is driven low. When the SPI is enabled as a master, the data direction
of this pin is controlled by DDD3. When the pin is forced to be an input, the pull-up can still be controlled by the PORTD3 bit.
MOSI_A: SPI master data output, slave data input for SPI channel. When the SPI is enabled as a slave, this pin is configured
as an input regardless of the setting of DDD3 When the SPI is enabled as a master, the data direction of this pin is controlled
by DDD3. When the pin is forced to be an input, the pull-up can still be controlled by the PORTD3 bit.
PCINT19, pin change Interrupt 19.
• PCINT18/PSCIN2/OC1A/MISO_A, Bit 2
PCSIN2, PSC digital input 2.
OC1A, output compare match A output: This pin can serve as an external output for the Timer/Counter1 output compare A.
The pin has to be configured as an output (DDD2 set “one”) to serve this function. The OC1A pin is also the output pin for the
PWM mode timer function.
MISO_A: Master data input, slave data output pin for SPI channel. When the SPI is enabled as a master, this pin is
configured as an input regardless of the setting of DDD2. When the SPI is enabled as a slave, the data direction of this pin is
controlled by DDD2. When the pin is forced to be an input, the pull-up can still be controlled by the PORTD2 bit.
PCINT18, pin change interrupt 18.
• PCINT17/PSCIN0/CLKO – Bit 1
PCSIN0, PSC digital input 0.
CLKO, divided system clock: The divided system clock can be output on this pin. The divided system clock will be output if
the CKOUT fuse is programmed, regardless of the PORTD1 and DDD1 settings. It will also be output during reset.
PCINT17, pin change interrupt 17.
• PCINT16/PSCOUT0A – Bit 0
PSCOUT0A: Output 0 of PSC 0.
PCINT16, pin change interrupt 16.
ATmega16/32/64/M1/C1 [DATASHEET]
65
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
