Table 9-13 relates the alternate functions of Port E to the overriding signals shown in Figure 9-5 on page 56.
Table 9-13. Overriding Signals for Alternate Functions in PE2..PE0
PE2/ADC0/XTAL2/
PCINT26
PE1/XTAL1/OC0B/
PCINT25
PE0/RESET/
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
OCD/PCINT24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OC0Ben
OC0B
0
0
0
ADC0D
0
0
Osc Output
ADC0
AIO
Osc / Clock input
9.4
Register Description for I/O-Ports
9.4.1 Port B Data Register – PORTB
Bit
7
6
5
4
3
2
1
0
PORTB7 PORTB6 PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 PORTB
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
9.4.2 Port B Data Direction Register – DDRB
Bit
7
DDB7
R/W
0
6
DDB6
R/W
0
5
DDB5
R/W
0
4
DDB4
R/W
0
3
DDB3
R/W
0
2
DDB2
R/W
0
1
DDB1
R/W
0
0
DDB0
R/W
0
DDRB
Read/Write
Initial Value
9.4.3 Port B Input Pins Address – PINB
Bit
7
6
5
4
3
2
1
0
PINB7
R/W
N/A
PINB6
R/W
N/A
PINB5
R/W
N/A
PINB4
R/W
N/A
PINB3
R/W
N/A
PINB2
R/W
N/A
PINB1
R/W
N/A
PINB0
R/W
N/A
PINB
Read/Write
Initial Value
9.4.4 Port C Data Register – PORTC
Bit
7
6
5
4
3
2
1
0
PORTC7 PORTC6 PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 PORTC
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
68
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15