17.4.7.3 Tx Service
If this service is enabled, the user sends a character by writing in LINDAT register. Automatically the LTXOK flag of
LINSIR register is cleared. It will rise at the end of the serial transmission. If no new character has to be sent, LTXOK flag
can be cleared separately (see specific flag management described in Section 17.6.2 “LIN Status and Interrupt Register -
LINSIR” on page 192).
There is no transmit buffering. No error is detected by this service.
17.5 LIN / UART Description
17.5.1 Reset
The AVR® core reset logic signal also resets the LIN/UART controller. Another form of reset exists, a software reset
controlled by LSWRES bit in LINCR register. This self-reset bit performs a partial reset as shown in Table 17-2.
Table 17-2. Reset of LIN/UART Registers
Register
LIN control register
Name
LINCR
Reset Value
0000 0000 b
0000 0000 b
0000 0000 b
0000 0000 b
0010 0000 b
0000 0000 b
0000 0000 b
0000 0000 b
1000 0000 b
0000 0000 b
0000 0000 b
LSWRES Value
0000 0000 b
0000 0000 b
xxxx 0000 b
0000 0000 b
0010 0000 b
uuuu uuuu b
xxxx uuuu b
0000 0000 b
1000 0000 b
xxxx 0000 b
0000 0000 b
Comment
LIN status and interrupt register
LIN enable interrupt register
LIN error register
LINSIR
LINENIR
LINERR
LINBTR
LINBRRL
LINBRRH
LINDLR
LINIDR
x=unknown
LIN bit timing register
LIN baud rate register low
LIN baud rate register high
LIN data length register
LIN identifier register
LIN data buffer selection
LIN data
u=unchanged
LINSEL
LINDAT
17.5.2 Clock
The I/O clock signal (clki/o) also clocks the LIN/UART controller. It is its unique clock.
17.5.3 LIN Protocol Selection
LIN13 bit in LINCR register is used to select the LIN protocol:
●
●
LIN13 = 0 (default): LIN 2.1 protocol,
LIN13 = 1: LIN 1.3 protocol.
The controller checks the LIN13 bit in computing the checksum (enhanced checksum in LIN2.1 / classic checksum in LIN
1.3). See Section 17.4.6.3 “Rx and TX Response Functions” on page 180.
This bit is irrelevant for UART commands.
ATmega16/32/64/M1/C1 [DATASHEET]
181
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
