欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA16M1-15MZ 参数 Datasheet PDF下载

ATMEGA16M1-15MZ图片预览
型号: ATMEGA16M1-15MZ
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 16KB FLASH 32QFN]
分类和应用: 微控制器
文件页数/大小: 318 页 / 7595 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号ATMEGA16M1-15MZ的Datasheet PDF文件第147页浏览型号ATMEGA16M1-15MZ的Datasheet PDF文件第148页浏览型号ATMEGA16M1-15MZ的Datasheet PDF文件第149页浏览型号ATMEGA16M1-15MZ的Datasheet PDF文件第150页浏览型号ATMEGA16M1-15MZ的Datasheet PDF文件第152页浏览型号ATMEGA16M1-15MZ的Datasheet PDF文件第153页浏览型号ATMEGA16M1-15MZ的Datasheet PDF文件第154页浏览型号ATMEGA16M1-15MZ的Datasheet PDF文件第155页  
16.5.2.5 Frame Buffer Receive Mode  
This mode is useful to receive multi frames. The priority between MObs offers a management for these incoming frames.  
One set MObs (including non-consecutive MObs) is created when the MObs are set in this mode. Due to the mode setting,  
only one set is possible. A frame buffer completed flag (or interrupt) - BXOK - will rise only when all the MObs of the set will  
have received their dedicated CAN frame.  
1. MObs in frame buffer receive mode need to be initialized as MObs in standard receive mode.  
2. The MObs are ready to receive data (or a remote) frames when their respective configurations are set  
(CONMOB).  
3. When a frame identifier is received on CAN network, the CAN channel scans all the MObs in receive mode, tries  
to find the MOb having the highest priority which is matching.  
4. On a hit, the IDT, the IDE and the DLC of the matched MOb are updated from the incoming (frame) values.  
5. Once the reception is completed, the data bytes of the received message are stored (not for remote frame) in the  
data buffer of the matched MOb and the RXOK flag is set (interrupt).  
6. When the reception in the last MOb of the set is completed, the frame buffer completed BXOK flag is set (inter-  
rupt). BXOK flag can be cleared only if all CONMOB fields of the set have been re-written before.  
7. All the parameters and data are available in the MObs until a new initialization.  
16.5.3 Acceptance Filter  
Upon a reception hit (i.e., a good comparison between the ID + RTR + RBn + IDE received and an IDT+ RTRTAG + RBnTAG +  
IDE specified while taking the comparison mask into account) the IDT + RTRTAG + RBnTAG + IDE received are updated in the  
MOb (written over the registers).  
Figure 16-10. Acceptance Filter Block Diagram  
Internal RxDcan  
Rx Shift Register (internal)  
ID and RB  
RTR  
IDE  
14(33)  
RB excluded  
=
13(31)  
1
Hit MOb[i]  
Write  
Enable  
14(33)  
13(31) - RB excluded  
IDE  
13(31)  
ID and RB  
RTRTAG  
IDMSK  
RTRMSKI IDEMSK  
CANIDT Registers and CANCDMOB (MOb[i])  
CANIDM Registers (MOb[i])  
Note:  
Examples:  
Full filtering: to accept only ID = 0x317 in part A.  
- ID MSK = 111 1111 1111 b  
- ID TAG = 011 0001 0111 b  
Partiel filtering: to accept ID from 0x310 up to 0x317 in part A.  
- ID MSK = 111 1111 1000 b  
- ID TAG = 011 0001 0xxx b  
No filtering: to accept all ID’s from 0x000 up to 0x7FF in part A.  
- ID MSK = 000 0000 0000 b  
- ID TAG = xxx xxxx xxxx b  
ATmega16/32/64/M1/C1 [DATASHEET]  
151  
7647O–AVR–01/15  
 
 复制成功!