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93C465AT-E/MC 参数 Datasheet PDF下载

93C465AT-E/MC图片预览
型号: 93C465AT-E/MC
PDF下载: 下载PDF文件 查看货源
内容描述: 1K - 16K与Microwire兼容串行EEPROM [1K-16K Microwire Compatible Serial EEPROMs]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 38 页 / 703 K
品牌: MICROCHIP [ MICROCHIP ]
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93XX46X/56X/66X/76X/86X  
The DO pin indicates the Ready/Busy status of the  
device if CS is brought high after a minimum of 250 ns  
low (TCSL). DO at logical ‘0’ indicates that programming  
is still in progress. DO at logical ‘1’ indicates that the  
register at the specified address has been erased and  
the device is ready for another instruction.  
3.4  
ERASE  
The ERASE instruction forces all data bits of the  
specified address to the logical ‘1’ state. CS is brought  
low following the loading of the last address bit. This  
falling edge of the CS pin initiates the self-timed  
programming cycle, except on ‘93CXX’ devices where  
the rising edge of CLK before the last address bit  
initiates the write cycle.  
Note:  
After the Erase cycle is complete, issuing  
a Start bit and then taking CS low will clear  
the Ready/Busy status from DO.  
FIGURE 3-1:  
ERASE TIMING FOR 93AAXX AND 93LCXX DEVICES  
TCSL  
Check Status  
CS  
CLK  
DI  
1
1
1
AN  
AN-1 AN-2  
A0  
•••  
TSV  
BUSY  
TCZ  
High-Z  
DO  
Ready  
High-Z  
TWC  
FIGURE 3-2:  
ERASE TIMING FOR 93CXX DEVICES  
TCSL  
Check Status  
CS  
CLK  
1
1
1
AN  
AN-1 AN-2  
A0  
•••  
DI  
TSV  
TCZ  
High-Z  
DO  
Busy  
Ready  
High-Z  
TWC  
© 2007 Microchip Technology Inc.  
DS21929D-page 11  
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