24AA65/24LC65/24C65
FIGURE 8-1:
CONTROL SEQUENCE BIT ASSIGNMENTS
Control Byte
Address Byte 1
Address Byte 0
Configuration Byte
A
7
A
0
A A
A
0
A
A A A A
B B B B
2
3 1 0
X
R X
1
0
1
0
S
0
0
•
•
•
•
•
•
R/W
2
1
12 1110 9
8
S/HE
Slave Device
Address Select
Bits
Block
Count
Security Read
Acknowledge
from
No
ACK
S
Master
S
t
Acknowledges from Device
t
a
r
Data from Device
Data from Device
o
p
R
t
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
A A
A
0
B
2
N N N N
1
1
B
3
B B
X X X X X
X X X X X X X
X
X
X X X
1
1
0
1
0
0
1
X X
X
1
1
X
1
1
1
1
1
2
1
3
2
1 0
1
0
S/HE
Starting Block
Number
Number of
Blocks to
Protect
Security Write
S
S
t
t
Acknowledges from Device
a
r
o
p
t
R
0
A
C
K
A
C
K
A
C
K
A
C
K
A A
A
0
N N N N
X
B B B
B
0
X
X X X X X X X
1
0
1
0
0
1
X X
X
1
X
2
1
2
3 1 0
3
2
1
S/HE
Starting Block
Number
Number of
Blocks to
Protect
No
High Endurance Block Read
ACK
S
t
S
t
a
r
t
Acknowledges from Device
o
p
Data from Device
R
1
A
C
K
A
C
K
A
C
K
A
C
K
A A
A
0
B
2
B
3
B B
0
X X X X X
X X X X X X X
X
X
X X X
1
1
1
0
1
0
0
1
X X
X
0
X
1
1
2
1
1
S/HE
High Endurance
Block Number
High Endurance Block Write
S
S
t
t
Acknowledges from Device
a
r
o
p
t
R
0
A
C
K
A
C
K
A
C
K
A
C
K
A A
A
0
B B B
B
0
X
X X X X X X X
X
0 0 0
0
1
0
1
0
0
1
X X
X
0
X
2
1
3
2
1
S/HE
High Endurance
Block Number
DS21073J-page 12
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
