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16F819 参数 Datasheet PDF下载

16F819图片预览
型号: 16F819
PDF下载: 下载PDF文件 查看货源
内容描述: 二十零分之一十八引脚增强型闪存微控制器采用纳瓦技术 [18/20-Pin Enhanced Flash Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 176 页 / 2950 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F818/819  
For example, CLRF STATUS, will clear the upper three  
bits and set the Z bit. This leaves the Status register as  
000u u1uu’ (where u= unchanged).  
2.2.2.1  
Status Register  
The Status register, shown in Register 2-1, contains the  
arithmetic status of the ALU, the Reset status and the  
bank select bits for data memory.  
It is recommended, therefore, that only BCF, BSF,  
SWAPF and MOVWF instructions are used to alter the  
Status register because these instructions do not affect  
the Z, C or DC bits from the Status register. For other  
instructions not affecting any status bits, see  
Section 13.0 “Instruction Set Summary”.  
The Status register can be the destination for any  
instruction, as with any other register. If the Status  
register is the destination for an instruction that affects  
the Z, DC or C bits, then the write to these three bits is  
disabled. These bits are set or cleared according to the  
device logic. Furthermore, the TO and PD bits are not  
writable. Therefore, the result of an instruction with the  
Status register as destination may be different than  
intended.  
Note:  
The C and DC bits operate as a borrow  
and digit borrow bit, respectively, in  
subtraction. See the SUBLW and SUBWF  
instructions for examples.  
REGISTER 2-1:  
STATUS: STATUS REGISTER (ADDRESS 03h, 83h, 103h, 183h)  
R/W-0  
IRP  
R/W-0  
RP1  
R/W-0  
RP0  
R-1  
TO  
R-1  
PD  
R/W-x  
Z
R/W-x  
DC  
R/W-x  
C
bit 7  
bit 0  
bit 7  
IRP: Register Bank Select bit (used for indirect addressing)  
1= Bank 2, 3 (100h-1FFh)  
0= Bank 0, 1 (00h-FFh)  
bit 6-5  
RP<1:0>: Register Bank Select bits (used for direct addressing)  
11= Bank 3 (180h-1FFh)  
10= Bank 2 (100h-17Fh)  
01= Bank 1 (80h-FFh)  
00= Bank 0 (00h-7Fh)  
Each bank is 128 bytes.  
bit 4  
bit 3  
bit 2  
bit 1  
bit 0  
TO: Time-out bit  
1= After power-up, CLRWDTinstruction or SLEEPinstruction  
0= A WDT time-out occurred  
PD: Power-down bit  
1= After power-up or by the CLRWDTinstruction  
0= By execution of the SLEEPinstruction  
Z: Zero bit  
1= The result of an arithmetic or logic operation is zero  
0= The result of an arithmetic or logic operation is not zero  
DC: Digit carry/borrow bit (ADDWF, ADDLW, SUBLWand SUBWFinstructions)(1)  
1= A carry-out from the 4th low order bit of the result occurred  
0= No carry-out from the 4th low order bit of the result  
C: Carry/borrow bit (ADDWF, ADDLW, SUBLWand SUBWFinstructions)(1,2)  
1= A carry-out from the Most Significant bit of the result occurred  
0= No carry-out from the Most Significant bit of the result occurred  
Note 1: For borrow, the polarity is reversed. A subtraction is executed by adding the two’s  
complement of the second operand.  
2: For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low-order  
bit of the source register.  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
DS39598E-page 16  
2004 Microchip Technology Inc.  
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