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16F819 参数 Datasheet PDF下载

16F819图片预览
型号: 16F819
PDF下载: 下载PDF文件 查看货源
内容描述: 二十零分之一十八引脚增强型闪存微控制器采用纳瓦技术 [18/20-Pin Enhanced Flash Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 176 页 / 2950 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F818/819  
2.2.2.3  
INTCON Register  
Note:  
Interrupt flag bits get set when an interrupt  
condition occurs regardless of the state of  
its corresponding enable bit or the Global  
Interrupt Enable bit, GIE (INTCON<7>).  
User software should ensure the appropri-  
ate interrupt flag bits are clear prior to  
enabling an interrupt.  
The INTCON register is a readable and writable regis-  
ter that contains various enable and flag bits for the  
TMR0 register overflow, RB port change and external  
RB0/INT pin interrupts.  
REGISTER 2-3:  
INTCON:INTERRUPTCONTROLREGISTER(ADDRESS0Bh,8Bh,10Bh,18Bh)  
R/W-0  
GIE  
R/W-0  
PEIE  
R/W-0  
R/W-0  
INTE  
R/W-0  
RBIE  
R/W-0  
R/W-0  
INTF  
R/W-x  
RBIF  
TMR0IE  
TMR0IF  
bit 7  
bit 0  
bit 7  
bit 6  
bit 5  
bit 4  
bit 3  
bit 2  
bit 1  
bit 0  
GIE: Global Interrupt Enable bit  
1= Enables all unmasked interrupts  
0= Disables all interrupts  
PEIE: Peripheral Interrupt Enable bit  
1= Enables all unmasked peripheral interrupts  
0= Disables all peripheral interrupts  
TMR0IE: TMR0 Overflow Interrupt Enable bit  
1= Enables the TMR0 interrupt  
0= Disables the TMR0 interrupt  
INTE: RB0/INT External Interrupt Enable bit  
1= Enables the RB0/INT external interrupt  
0= Disables the RB0/INT external interrupt  
RBIE: RB Port Change Interrupt Enable bit  
1= Enables the RB port change interrupt  
0= Disables the RB port change interrupt  
TMR0IF: TMR0 Overflow Interrupt Flag bit  
1= TMR0 register has overflowed (must be cleared in software)  
0= TMR0 register did not overflow  
INTF: RB0/INT External Interrupt Flag bit  
1= The RB0/INT external interrupt occurred (must be cleared in software)  
0= The RB0/INT external interrupt did not occur  
RBIF: RB Port Change Interrupt Flag bit  
A mismatch condition will continue to set flag bit RBIF. Reading PORTB will end the mismatch  
condition and allow flag bit RBIF to be cleared.  
1= At least one of the RB7:RB4 pins changed state (must be cleared in software)  
0= None of the RB7:RB4 pins have changed state  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
DS39598E-page 18  
2004 Microchip Technology Inc.  
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