PIC16F818/819
FIGURE 2-4:
PIC16F819 REGISTER FILE MAP
File
Address
File
Address
File
Address
File
Address
Indirect addr.(*)
Indirect addr.(*)
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h
Indirect addr.(*)
Indirect addr.(*)
80h
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
OPTION_REG
PCL
TMR0
TMR0
PCL
OPTION_REG 81h
PCL
STATUS
FSR
PCL
STATUS
FSR
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
STATUS
FSR
STATUS
FSR
PORTA
PORTB
TRISA
TRISB
TRISB
PORTB
PCLATH
INTCON
PCLATH
INTCON
PIR1
PCLATH
INTCON
PCLATH
INTCON
EECON1
EECON2
Reserved(1)
Reserved(1)
EEDATA
EEADR
PIE1
PIE2
PIR2
TMR1L
TMR1H
T1CON
TMR2
PCON
OSCCON
EEDATH
EEADRH
OSCTUNE
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
PR2
SSPADD
SSPSTAT
ADRESL
ADCON1
ADRESH
ADCON0
11Fh
120h
19Fh
1A0h
A0h
General
Purpose
Register
General
Purpose
Register
General
Purpose
Register
Accesses
20h-7Fh
80 Bytes
80 Bytes
96 Bytes
16Fh
170h
EFh
F0h
Accesses
70h-7Fh
Accesses
70h-7Fh
17Fh
1FFh
7Fh
FFh
Bank 3
Bank 1
Bank 2
Bank 0
Unimplemented data memory locations, read as ‘0’.
* Not a physical register.
Note 1: These registers are reserved; maintain these registers clear.
DS39598E-page 12
2004 Microchip Technology Inc.