11AAXXX/11LCXXX
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user through the WRSR instruction.
These bits are nonvolatile.
4.5
Read Status Register (RDSR)
Instruction
The RDSRinstruction provides access to the STATUS
register. The STATUS register may be read at any time,
even during a write cycle. The STATUS register is
formatted as follows:
Note: If Read Status Register command is
initiated while the 11XX is currently
executing an internal write cycle on the
STATUS register, the new Block
Protection bit values will be read during
the entire command.
7
6
5
4
3
2
1
0
X
X
X
X
BP1
BP0
WEL
WIP
Note: Bits 4-7 are don’t cares, and will read as ‘0’.
The WIP and WEL bits will update dynamically (asyn-
chronous to issuing the RDSR instruction). Further-
more, after the STATUS register data is received, the
master can provide a MAK during the Acknowledge
sequence to request that the data be transmitted again.
This allows the master to continuously monitor the WIP
and WEL bits without the need to issue another full
command.
The Write-In-Process (WIP) bit indicates whether the
11XX is busy with a write operation. When set to a ‘1’,
a write is in progress, when set to a ‘0’, no write is in
progress. This bit is read-only.
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch. When set to a ‘1’, the latch
allows writes to the array, when set to a ‘0’, the latch
prohibits writes to the array. This bit is set and cleared
using the WREN and WRDI instructions, respectively.
This bit is read-only for any other instruction.
Once the master is finished, it provides a NoMAK to
end the operation.
Note: The current drawn for a Read Status
Register command during a write cycle
is a combination of the ICC Read and ICC
Write operating currents.
FIGURE 4-6:
READ STATUS REGISTER COMMAND SEQUENCE
Device Address
Standby Pulse
Start Header
SCIO
0 1 0 1 0 1 0 1
1 0 1 0 0 0 0 0(1)
Command
STATUS Register Data
3 2 1 0
SCIO
0 0 0 0 0 1 0 1
0 0 0 0
Note 1: For the 11XXXX1, this bit must be a ‘1’.
Note 2:The STATUS register data can continuously be read, or polled, by transmitting a MAK in place of the NoMAK.
DS22067H-page 14
Preliminary
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
