11AAXXX/11LCXXX
After transmitting the STATUS register data, the master
must transmit a NoMAK during the Acknowledge
sequence in order to initiate the internal write cycle.
4.6
Write Status Register (WRSR)
Instruction
The WRSRinstruction allows the user to select one of
four levels of protection for the array by writing to the
appropriate bits in the STATUS register. The array is
divided up into four segments. The user has the ability
to write-protect none, one, two, or all four of the seg-
ments of the array. The partitioning is controlled as
illustrated in Table 4-3.
Note: The WRSR instruction must be termi-
nated with a NoMAK following the data
byte. If a NoMAK is not received at this
point, the command will be considered
invalid, and the device will go into Idle
mode without responding with a SAK or
executing the command.
TABLE 4-3:
BP1
ARRAY PROTECTION
BP0
Address Ranges Write-Protected
Address Ranges Unprotected
0
0
1
1
0
1
0
1
None
Upper 1/4
Upper 1/2
All
All
Lower 3/4
Lower 1/2
None
TABLE 4-4:
PROTECTED ARRAY ADDRESS LOCATIONS
Density
Upper 1/4
Upper 1/2
All Sectors
1K
2K
4K
8K
60h-7Fh
C0h-FFh
40h-7Fh
80h-FFh
00h-7Fh
00h-FFh
180h-1FFh
300h-3FFh
600h-7FFh
100h-1FFh
200h-3FFh
400h-7FFh
000h-1FFh
000h-3FFh
000h-7FFh
16K
FIGURE 4-7:
WRITE STATUS REGISTER COMMAND SEQUENCE
Device Address
Standby Pulse
Start Header
SCIO
SCIO
0 1 0 1 0 1 0 1
1 0 1 0 0 0 0 0(1)
Command
Status Register Data
7 6 5 4 3 2 1 0
Twc
0 1 1 0 1 1 1 0
Note 1: For the 11XXXX1, this bit must be a ‘1’.
2010 Microchip Technology Inc.
Preliminary
DS22067H-page 15
MICROCHIP [ MICROCHIP ]
