ML2724
PIN DESCRIPTIONS
PIN
SIGNAL
NAME
I/O
FUNCTION
DIAGRAM
POWER & GROUND
8
10
VSS
RVPLL
GND
PWR
Digital Ground. Ground for digital I/O
circuits and control logic.
PLL Supply. DC power supply
decoupling point for the PLL dividers,
phase detector, and charge pump. This
pin is connected to the output of the
regulator and to the PLL supplies. There
must be a 220nF capacitor to ground
from this pin to decouple (bypass) noise
and to stabilize the regulator.
Ground for the PLL dividers, phase
detector, and charge pump.
DC Power Supply Input to the VCO
voltage regulator. Must be connected to
RVQMIF (pin 27) or RVDMD (pin 29) via
decoupling network.
DC power supply decoupling point for the
VCO. Connected to the output of the
VCO regulator. A 220nF capacitor must
be tied between this pin and ground to
decouple (bypass) noise and to stabilize
the regulator.
DC ground for VCO and LO circuits.
Ground return for the Receive RF input
and Transmit RF output.
N/A
See Pin 11 below.
12
13
GNDPLL
VVREG
GND
PWR
N/A
N/A
14
RVVCO
PWR
N/A
16
18
GND
GNDRF
GND
GND
N/A
VCCA
24
0.7V
RXI
17
4k
VSS (PIN 8)
VCCA
(PIN 24)
GNDRF 18
8
VSS
19
20
23
GNDRXMX
GNDRXMX2
RVLO
GND
GND
PWR
Signal ground for the Receive mixers.
Signal ground for the Receive mixers.
DC power supply decoupling point for the
LO Chain. Connected to the output of a
regulator. A 220nF capacitor must be tied
between this pin and ground to decouple
(bypass) noise and to stabilize the
regulator.
N/A
N/A
N/A
DS2724-F-01
FINAL DATASHEET
APRIL 2003
7