ML2724
PIN
SIGNAL
NAME
I/O
FUNCTION
DIAGRAM
RVPLL
10
11
QPO
O
Charge Pump Output of the phase
detector. This is connected to the
external PLL loop filter.
11 QPO
8
VSS
VCCA
24
15
VTUNE
I
VCO Tuning Voltage input from the PLL
loop filter. This pin is very sensitive to
noise coupling and leakage currents.
1.25V
VTUNE 15
3.7k
8
VSS
26
28
VBG
O
O
Bandgap Decouple Voltage. Decoupled
to ground with a 220nF capacitor.
N/A
RSSI
Buffered Analog RSSI output with a
nominal sensitivity of 35mV/dB. In analog
test modes, this pin and the AOUT output
become test access points controlled by
the serial control bus.
TPI
MUX
VCCA
24
RSSI
RSSI
MUX
RSSI
28
OP
AMP
100 Ω
8
VSS
DS2724-F-01
FINAL DATASHEET
APRIL 2003
11