KSZ8795CLX
4.3
Advanced Control Registers
Registers 104 to 109 define the switching engine’s MAC address. This 48-bit address is used as the source address in
MAC pause control frames.
TABLE 4-5:
Address Name
Register 104 (0x68): MAC Address Register 0
7 - 0 MACA[47:40] —
Register 105 (0x69): MAC Address Register 1
7 - 0 MACA[39:32] —
Register 106 (0x6A): MAC Address Register 2
7 - 0 MACA[31:24] —
Register 107 (0x6B): MAC Address Register 3
7 - 0 MACA[23:16] —
Register 108 (0x6C): MAC Address Register 4
7 - 0 MACA[15:8]
Register 109 (0X6D): MAC Address Register 5
7 - 0 MACA[7:0]
ADVANCED CONTROL REGISTERS 104 - 109
Description
Mode
Default
R/W
R/W
R/W
R/W
R/W
R/W
0x00
0x10
0xA1
0xff
—
0xff
—
0xff
Use Registers 110 and 111 to read or write data to the static MAC address table, VLAN table, dynamic address table,
PME registers, ACL tables, EEE registers and the MIB counters.
TABLE 4-6:
Address
ADVANCED CONTROL REGISTERS 110 - 111
Name Description
Mode
Default
Register 110 (0x6E): Indirect Access Control 0
7 - 5 EEE/ACL/ 000 = Indirect mode is used for table select in bits
PME Indirect [3:2]. While these bits are not equal 000, bits [3:2]
R/W
000
Register
Function
Select
are used for 2 additional MSB address bits.
001 = Global and Port base EEE registers are
selected, port count is specified in 4 MSB indirect
address bits and 8 bits register pointer is specified
in 8 LSB indirect address bits.
010 = Port-base ACL registers are selected, Port
count is specified in 4 MSB indirect address bits
and register pointer is specified in 8 LSB indirect
address bits.
011 = Reserved
100 = PME control registers are selected.
101 = LinkMD cable diagnosis used. (See example
in “LinkMD Cable Diagnostics” sub-section).
4
Read High 1 = Read cycle.
Write Low 0 = Write cycle.
R/W
0
2016 Microchip Technology Inc.
DS00002112A-page 63
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