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KSZ8795CLX 参数 Datasheet PDF下载

KSZ8795CLX图片预览
型号: KSZ8795CLX
PDF下载: 下载PDF文件 查看货源
内容描述: [Integrated 5-Port 10/100-Managed Ethernet Switch with Gigabit GMII/RGMII and MII/RMII Interfaces]
分类和应用: 局域网(LAN)标准
文件页数/大小: 132 页 / 1359 K
品牌: MICREL [ MICREL SEMICONDUCTOR ]
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KSZ8795CLX  
00 = normal condition (valid test)  
01 = open condition detected in cable (valid test)  
10 = short condition detected in cable (valid test)  
11 = cable diagnostic test failed (invalid test)  
The ‘11’ case, invalid test, occurs when the KSZ8795CLX is unable to shut down the link partner. In this instance, the  
test is not run, since it would be impossible for the KSZ8795CLX to determine if the detected signal is a reflection of the  
signal generated or a signal from another source.  
5. Get distance to fault by concatenating Register 26, bit[0] and Register 27, bits [7:0]; and multiplying the result by  
a constant of 0.4. The distance to the cable fault can be determined by the following formula:  
D (distance to cable fault, expressed in meters) = 0.4 x (Register 26, Bit[0], Register 27, bits [7:0])  
Concatenated value of Registers 26 Bit[0] and 27 bits [7:0] should be converted to decimal before multiplying by 0.4.  
The constant (0.4) may be calibrated for different cabling conditions, including cables with a velocity of propagation that  
varies significantly from the norm.  
For Ports 2, 3, 4, and using the MIIM PHY registers, LinkMD usage is similar.  
3.1.9.3  
A LinkMD Example  
The following is a sample procedure for using LinkMD on Ports 1, 2, 3, and 4 with force MDI-X mode:  
//Disable MDI/MDI-X and force to MDI-X mode  
//’w’ is WRITE the register. ‘r’ is READ register below  
w 1d 04  
w 2d 04  
w 3d 04  
w 4d 04  
//Set Internal registers temporary by indirect registers, adjust for LinkMD  
w 6e a0  
w 6f 4d  
w a0 80  
//Enable LinkMD Testing with fault cable for Ports 1, 2, 3 and 4  
w 1a 10  
w 2a 10  
w 3a 10  
w 4a 10  
//Wait until Port Register Control 8 Bit[4] returns a ‘0’ (Self Clear)  
//Diagnosis results  
r 1a  
r 1b  
r 2a  
r 2b  
r 3a  
r 3b  
r 4a  
r 4b  
//For example on Port 1, the result analysis based on the values of the register 0x1a and 0x1b  
//The register 0x1a Bits[6-5] are for the open or the short detection.  
//The register 0x1a Bit[0] + the register 0x1b bits [7-0] = CDT_Fault_Count [8-0]  
//The distance to fault is about 0.4 x (CDT_Fault_Count [8-0])  
2016 Microchip Technology Inc.  
DS00002112A-page 17  
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