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KSZ8041NL 参数 Datasheet PDF下载

KSZ8041NL图片预览
型号: KSZ8041NL
PDF下载: 下载PDF文件 查看货源
内容描述: 10BASE-T / 100BASE-TX物理层收发器 [10Base-T/100Base-TX Physical Layer Transceiver]
分类和应用:
文件页数/大小: 45 页 / 601 K
品牌: MICREL [ MICREL SEMICONDUCTOR ]
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Micrel, Inc.  
KSZ8041NL  
Functional Description  
The KSZ8041NL is a single 3.3V supply Fast Ethernet transceiver. It is fully compliant with the IEEE 802.3u Specification.  
On the media side, the KSZ8041NL supports 10Base-T and 100Base-TX with HP auto MDI/MDI-X for reliable detection of  
and correction for straight-through and crossover cables.  
The KSZ8041NL offers a choice of MII or RMII data interface connection with the MAC processor. The MII management  
bus option gives the MAC processor complete access to the KSZ8041NL control and status registers. Additionally, an  
interrupt pin eliminates the need for the processor to poll for PHY status change.  
Physical signal transmission and reception are enhanced through the use of patented analog circuitries that make the  
design more efficient and allow for lower power consumption and smaller chip die size.  
100Base-TX Transmit  
The 100Base-TX transmit function performs parallel-to-serial conversion, 4B/5B coding, scrambling, NRZ-to-NRZI  
conversion, and MLT3 encoding and transmission.  
The circuitry starts with a parallel-to-serial conversion, which converts the MII data from the MAC into a 125MHz serial bit  
stream. The data and control stream is then converted into 4B/5B coding, followed by a scrambler. The serialized data is  
further converted from NRZ-to-NRZI format, and then transmitted in MLT3 current output.  
The output current is set by an external 6.49k1% resistor for the 1:1 transformer ratio. It has typical rise/fall times of 4  
ns and complies with the ANSI TP-PMD standard regarding amplitude balance, overshoot and timing jitter. The wave-  
shaped 10Base-T output drivers are also incorporated into the 100Base-TX drivers.  
100Base-TX Receive  
The 100Base-TX receiver function performs adaptive equalization, DC restoration, MLT3-to-NRZI conversion, data and  
clock recovery, NRZI-to-NRZ conversion, de-scrambling, 4B/5B decoding, and serial-to-parallel conversion.  
The receiving side starts with the equalization filter to compensate for inter-symbol interference (ISI) over the twisted pair  
cable. Since the amplitude loss and phase distortion is a function of the cable length, the equalizer must adjust its  
characteristics to optimize performance. In this design, the variable equalizer makes an initial estimation based on  
comparisons of incoming signal strength against some known cable characteristics, and then tunes itself for optimization.  
This is an ongoing process and self-adjusts against environmental changes such as temperature variations.  
Next, the equalized signal goes through a DC restoration and data conversion block. The DC restoration circuit is used to  
compensate for the effect of baseline wander and to improve the dynamic range. The differential data conversion circuit  
converts the MLT3 format back to NRZI. The slicing threshold is also adaptive.  
The clock recovery circuit extracts the 125MHz clock from the edges of the NRZI signal. This recovered clock is then used  
to convert the NRZI signal into the NRZ format. This signal is sent through the de-scrambler followed by the 4B/5B  
decoder. Finally, the NRZ serial data is converted to the MII format and provided as the input data to the MAC.  
PLL Clock Synthesizer  
The KSZ8041NL generates 125MΗz, 25MΗz and 20MΗz clocks for system timing. Internal clocks are generated from an  
external 25MHz crystal or oscillator. In RMII mode, these internal clocks are generated from an external 50MHz oscillator  
or system clock.  
Scrambler/De-scrambler (100Base-TX only)  
The purpose of the scrambler is to spread the power spectrum of the signal in order to reduce EMI and baseline wander.  
10Base-T Transmit  
The 10Base-T drivers are incorporated with the 100Base-TX drivers to allow for transmission using the same magnetic.  
The drivers also perform internal wave-shaping and pre-emphasize, and output 10Base-T signals with a typical amplitude  
of 2.5V peak. The 10Base-T signals have harmonic contents that are at least 27dB below the fundamental frequency  
when driven by an all-ones Manchester-encoded signal.  
10Base-T Receive  
On the receive side, input buffer and level detecting squelch circuits are employed. A differential input receiver circuit and  
a PLL performs the decoding function. The Manchester-encoded data stream is separated into clock signal and NRZ data.  
A squelch circuit rejects signals with levels less than 400 mV or with short pulse widths to prevent noise at the RX+ and  
October 2006  
13  
M9999-102406-1.0