WE32K32-XXX
WRITE
A write cycle is initiated when OE# is high and a low pulse is on
WE# or CS# with CS# or WE# low. The address is latched on the
falling edge of CS# or WE# whichever occurs last. The data is
latched by the rising edge of CS# or WE#, whichever occurs first.
A byte write operation will automatically continue to completion.
The WE# line transition from high to low also initiates an internal
150 μsec delay timer to permit page mode operation. Each
subsequent WE# transition from high to low that occurs before the
completion of the 150 μsec time out will restart the timer from zero.
The operation of the timer is the same as a retriggerable one-shot.
WRITE CYCLE TIMING
Figures 4 and 5 show the write cycle timing relationships. A write
cycle begins with address application, write enable and chip select.
Chip select is accomplished by placing the CS# line low. Write
enable consists of setting the WE# line low. The write cycle begins
when the last of either CS# or WE# goes low.
AC WRITE CHARACTERISTICS
VCC = 5.0V, GND = 0V, -55°C ≤ TA ≤ +125°C
-80 -90
-120
-150
WRITE CYCLE
Symbol
Unit
Write Cycle Parameter
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time, TYP = 6ms
Address Set-up Time
tWC
tAS
tWP
tCS
10
10
10
10
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0
100
0
0
100
0
30
150
0
30
150
0
Write Pulse Width (WE# or CS#)
Chip Select Set-up Time
Address Hold Time
tAH
50
0
50
0
100
10
0
100
10
0
Data Hold Time
tDH
Chip Select Hold Time
Data Set-up Time
tCSH
tDS
0
0
50
50
10
10
50
50
10
10
100
50
10
10
100
50
10
10
Write Pulse Width High
Output Enable Set-up Time
Output Enable Hold Time
tWPH
tOES
tOEH
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 9
4
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
MERCURY [ MERCURY UNITED ELECTRONICS INC ]
