1GB – 128M x 72 DDR2 SDRAM
208 PBGA Multi-Chip Package
W3H128M72E-XSBX / W3H128M72E-XNBX
FEATURES
Data rate = 667, 533, 400
Package:
• 208 Plastic Ball Grid Array (PBGA), 16 x 22mm
• 1.0mm pitch
Core Supply Voltage = 1.8V
I/O Supply Voltage = 1.8V - (SSTL_18 compatible)
Differential data strobe (DQS, DQS#) per byte
Internal, pipelined, double data rate architecture
4-bit prefetch architecture
DLL for alignment of DQ and DQS transitions with clock
signal
Eight internal banks for concurrent operation
(Per DDR2 SDRAM Die)
Programmable Burst lengths: 4 or 8
Auto Refresh and Self Refresh Modes
On Die Termination (ODT)
Adjustable data – output drive strength
Programmable CAS latency (CL)
Posted CAS additive latency (AL)
CK/CK# Termination options available
• 0 ohm, 20 ohm
Write latency = Read latency - 1* t
CK
Commercial, Industrial and Military Temperature Ranges
Organized as 128M x 72
Weight: W3H128M72E-XSBX - 4 grams max
Weight: W3H128M72E-XNBX - TBD
BENEFITS
56% space savings vs. FBGA
Reduced part count
50% I/O reduction vs FBGA
Reduced trace lengths for lower parasitic capacitance
Suitable for hi-reliability applications
* This product is subject to change without notice.
TYPICAL APPLICATION
RAM
Host
FPGA/
Processor
DDR2 / DDR3
W3H128M72E-XSBX / -XNBX
SSD (SLC)
MSM032 / MSM064 (SATA BGA)
W7N16GVHxxBI (PATA BGA)
5in
)
n
MSD1TB / 512 / 256 / 128 (SATA, 2.5in)
FIGURE 1 – DENSITY COMPARISONS
CSP Approach (mm)
11.5
11.5
11.5
11.5
11.5
22
14.0
84
FBGA
84
FBGA
84
FBGA
84
FBGA
84
FBGA
W3H128M72E-XXXX
W3H128M72E-XXXX
16
S
A
V
I
N
G
S
56%
50%
Area
I/O Count
5 x 161mm
2
= 805mm
2
5 x 84 balls = 420 balls
352mm
2
208 Balls
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com
1
4163.12E-0716-ss-W3H128M72E-XSBX / XNBX
MERCURY [ MERCURY UNITED ELECTRONICS INC ]
