edge. If both bits are set, both edges will be enabled, and a capture will occur for either
transition. The bit ECOMn when set enables the comparator function.
SFR: CL (PCA Counter Low Byte)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-4
Bit-3
Bit-3
Bit-2
Bit-2
Bit-1
Bit-1
Bit-1
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
SFR: CH (PCA Counter High Byte)
Bit-7
Bit-6
Bit-5
SFR: CCAP0L (Low byte of PCA module-0 Compare/Capture register)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Low Byte of the Compare/ Capture register in PCA Module 0
SFR: CCAP0H (High byte of PCA module-0 Compare/Capture register)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
High Byte of the Compare/ Capture register in PCA Module 0
SFR: CCAP1L (Low byte of PCA module-1 Compare/Capture register)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Low Byte of the Compare/ Capture register in PCA Module 1
SFR: CCAP1H (High byte of PCA module-1 Compare/Capture register)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
High Byte of the Compare/ Capture register in PCA Module 1
SFR: CCAP2L (Low byte of PCA module-2 Compare/Capture register)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Low Byte of the Compare/ Capture register in PCA Module 2
SFR: CCAP2H (High byte of PCA module-2 Compare/Capture register)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
High Byte of the Compare/ Capture register in PCA Module 2
SFR: CCAP3L (Low byte of PCA module-3 Compare/Capture register)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Low Byte of the Compare/ Capture register in PCA Module 3
SFR: CCAP3H (High byte of PCA module-3 Compare/Capture register)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
High Byte of the Compare/ Capture register in PCA Module 3
SFR: CCAPM0 (PCA Module-0 Mode Register)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
-
ECOM0
CAPP0
CAPN0
MAT0
TOG0
PWM0
ECCF0
SFR: CCAPM1 (PCA Module-1 Mode Register)
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
MEGAWIN
MPC82x54A Data Sheet
41