7 On-Chip eXpanded RAM (XRAM)
To access the on-chip expanded RAM (XRAM), the EXTRAM bit should be cleared to 0. The 1024 bytes of
XRAM (with addresses 0000H to 03FFH) are indirectly accessed by move external instruction, “MOVX @DPTR”.
An access to XRAM will have not any outputting of address, address latch enable and read/write strobe. That
means P0, P2, ALE (P3.5 or P4.1), /WR (P3.6) and /RD (P3.7) will keep unchanged during access of XRAM.
However, if the address is more than 0x03FF, the access will be automatically switched to the external data
memory.
AUXR (Address=8EH, Auxiliary Register, Reset Value=0000,xx0xB)
7
6
5
4
3
2
1
0
-
URTS
ADRJ
P41ALE P35ALE
-
-
EXTRAM
EXTRAM:
0: Disable accessing to external data memory while address less than 0x0400;
Accessing of addresses 0x0000~0x03FF are automatically switched to on-chip XRAM.
1: Enable accessing to whole external data memory with addresses 0x0000~0xFFFF;
Accessing of on-chip XRAM is disabled.
7.1 Using the XRAM in Software
For Keil-C51 compiler, to assign the variables to be located at XRAM, the “xdata” declaration should be used.
After being compiled, the variables declared by “xdata” will become the memories accessed by “MOVX @DPTR”.
The user can get the following descriptions from the “Keil Software — Cx51 Compiler User’s Guide”.
Table 7-1. Declaration of XRAM Memory Type
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MPC82G516A Data Sheet
30
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