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MX29LV040CQC-55Q 参数 Datasheet PDF下载

MX29LV040CQC-55Q图片预览
型号: MX29LV040CQC-55Q
PDF下载: 下载PDF文件 查看货源
内容描述: 4M- BIT [ 512K ×8 ] CMOS单电压3V只相当于行业FLASH MEMORY [4M-BIT [512K x 8] CMOS SINGLE VOLTAGE 3V ONLY EQUAL SECTOR FLASH MEMORY]
分类和应用:
文件页数/大小: 52 页 / 485 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX29LV040C  
write commands to the command register using stan-  
dard microprocessor write timings. The device will auto-  
matically pre-program and verify the entire array. Then  
the device automatically times the erase pulse width,  
provides the erase verification, and counts the number  
of sequences. A status bit toggling between consecu-  
tive read cycles provides feedback to the user as to the  
status of the erasing operation.  
AUTOMATIC PROGRAMMING  
The MX29LV040C is byte programmable using the Au-  
tomatic Programming algorithm. The Automatic Program-  
ming algorithm makes the external system do not need  
to have time out sequence nor to verify the data pro-  
grammed. The typical chip programming time at room  
temperature of the MX29LV040C is less than 10 sec-  
onds.  
Register contents serve as inputs to an internal state-  
machine which controls the erase and programming cir-  
cuitry. During write cycles, the command register inter-  
nally latches address and data needed for the program-  
ming and erase operations. During a system write cycle,  
addresses are latched on the falling edge, and data are  
latched on the rising edge of WE# or CE#, whichever  
happens first.  
AUTOMATIC CHIP ERASE  
The entire chip is bulk erased using 10 ms erase pulses  
according to MXIC's Automatic Chip Erase algorithm.  
Typical erasure at room temperature is accomplished in  
less than 4 second. The Automatic Erase algorithm au-  
tomatically programs the entire array prior to electrical  
erase. The timing and verification of electrical erase are  
controlled internally within the device.  
MXIC's Flash technology combines years of EPROM  
experience to produce the highest levels of quality, reli-  
ability, and cost effectiveness. The MX29LV040C elec-  
trically erases all bits simultaneously using Fowler-  
Nordheim tunneling. The bytes are programmed by us-  
ing the EPROM programming mechanism of hot elec-  
tron injection.  
AUTOMATIC SECTOR ERASE  
The MX29LV040C is sector(s) erasable using MXIC's  
Auto Sector Erase algorithm. The Automatic Sector  
Erase algorithm automatically programs the specified  
sector(s) prior to electrical erase. The timing and verifi-  
cation of electrical erase are controlled internally within  
the device. An erase operation can erase one sector,  
multiple sectors, or the entire device.  
During a program cycle, the state-machine will control  
the program sequences and command register will not  
respond to any command set. During a Sector Erase  
cycle, the command register will only respond to Erase  
Suspend command. After Erase Suspend is completed,  
the device stays in read mode. After the state machine  
has completed its task, it will allow the command regis-  
ter to respond to its full command set.  
AUTOMATIC PROGRAMMING ALGORITHM  
MXIC's Automatic Programming algorithm requires the  
user to only write program set-up commands (including  
2 unlock write cycle and A0H) and a program command  
(program data and address). The device automatically  
times the programming pulse width, provides the pro-  
gram verification, and counts the number of sequences.  
A status bit similar to Data# Polling and a status bit  
toggling between consecutive read cycles, provide feed-  
back to the user as to the status of the programming  
operation. Refer to write operation status table 6, for more  
information on these status bits.  
AUTOMATIC SELECT  
The automatic select mode provides manufacturer and  
device identification, and sector protection verification,  
through identifier codes output on Q7~Q0.This mode is  
mainly adapted for programming equipment on the de-  
vice to be programmed with its programming algorithm.  
When programming by high voltage method, automatic  
select mode requires VID (11.5V to 12.5V) on address  
pin A9 and other address pin A6, A1, and A0 as referring  
to Table 2. In addition, to access the automatic select  
codes in-system, the host can issue the automatic se-  
lect command through the command register without  
requiring VID, as shown in table 3.  
AUTOMATIC ERASE ALGORITHM  
MXIC's Automatic Erase algorithm requires the user to  
P/N:PM1149  
REV. 1.3, APR. 24, 2006  
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