MX25L4006E
Figure 3. Maximum Negative Overshoot Waveform ..........................................................................................26
CAPACITANCE TA = 25°C, f = 1.0 MHz............................................................................................................. 26
Figure 4. Maximum Positive Overshoot Waveform............................................................................................26
Figure 5. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL..............................................................27
Figure 6. OUTPUT LOADING ........................................................................................................................... 27
Table 6. DC CHARACTERISTICS (Temperature = -40°C to 85°C, VCC = 2.7V ~ 3.6V) ................................. 28
Table 7. AC CHARACTERISTICS (Temperature = -40°C to 85°C, VCC = 2.7V ~ 3.6V) ................................. 29
Table 8. Power-Up Timing ..................................................................................................................................30
Timing Analysis........................................................................................................................................................31
Figure 7. Serial Input Timing .............................................................................................................................. 31
Figure 8. Output Timing......................................................................................................................................31
Figure 9. Hold Timing .........................................................................................................................................32
Figure 10. WP# Disable Setup and Hold Timing during WRSR when SRWD=1 ............................................... 32
Figure 11. Write Enable (WREN) Sequence (Command 06) .............................................................................33
Figure 12. Write Disable (WRDI) Sequence (Command 04)..............................................................................33
Figure 13. Read Status Register (RDSR) Sequence (Command 05) ................................................................33
Figure 14. Write Status Register (WRSR) Sequence (Command 01)...............................................................34
Figure 15. Read Data Bytes (READ) Sequence (Command 03) ......................................................................34
Figure 16. Read at Higher Speed (FAST_READ) Sequence (Command 0B)................................................... 35
Figure 17. Dual Output Read Mode Sequence (Command 3B).........................................................................35
Figure 18. Sector Erase (SE) Sequence (Command 20)..................................................................................36
Figure 19. Block Erase (BE) Sequence (Command 52 or D8)..........................................................................36
Figure 20. Chip Erase (CE) Sequence (Command 60 or C7)...........................................................................36
Figure 21. Page Program (PP) Sequence (Command 02)................................................................................37
Figure 22. Deep Power-down (DP) Sequence (Command B9).........................................................................37
Figure 23. Read Electronic Signature (RES) Sequence (Command AB)..........................................................38
Figure 24. Release from Deep Power-down (RDP) Sequence (Command AB) ............................................... 38
Figure 25. Read Identification (RDID) Sequence (Command 9F)......................................................................39
Figure 26. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90).............................. 39
Figure 27. Power-up Timing ............................................................................................................................... 40
OPERATING CONDITIONS.......................................................................................................................................41
Figure 28. AC Timing at Device Power-Up......................................................................................................... 41
Figure 29. Power-Down Sequence .................................................................................................................... 42
ERASE AND PROGRAMMING PERFORMANCE....................................................................................................43
DATA RETENTION ...................................................................................................................................................43
LATCH-UP CHARACTERISTICS..............................................................................................................................43
ORDERING INFORMATION......................................................................................................................................44
PART NAME DESCRIPTION.....................................................................................................................................45
PACKAGE INFORMATION........................................................................................................................................46
REVISION HISTORY .................................................................................................................................................51
P/N: PM1576
REV. 1.3, FEB. 10, 2012
3