MX25L12835F
9-38. Password Protection Mode
The security level of Password Protection Method is higher than the Solid protection mode. The 64 bit password is
requested before modify SPB lock bit status. When device is under password protection mode, the SPB lock bit is set “0”,
after a power-up cycle or Reset Command.
A correct password is required for password Unlock command, to unlock the SPB lock bit. Await 2us is necessary to
unlocked the device after valid password is given. After that, the SPB bits are allows to be changed. The Password
Unlock command are issued slower than 2us every time, to prevent hacker from trying all the 64-bit password
combinations.
To place the device in password protection mode, a few more steps are required. First, prior to entering the
password protection mode, it is necessary to set a 64-bit password to verify it. Password verification is only
allowed during the password programming operation. Second, the password protection mode is then activated
by programming the Password Protection Mode Lock Bit to”0”. This operation is not reversible. Once the bit is
programmed, it cannot be erased, and the device remains permanently in password protection mode, and the 64-bit
password can neither be retrieved nor reprogrammed. Moreover, all commands to the address where the password
is stored are disabled.
The password is all “1”s when shipped from the factory, it is only capable of programming "0"s under password
program command. All 64-bit password combinations are valid as a password. No special address is required for
programming the password. The password is no longer readable after the Password Protection mode is selected by
programming Lock register bit 2 to "0".
Once sector under protected status, device will ignores the program/erase command, enable status polling and
returns to read mode without contents change. The DPB, SPB and SPB lock bit status of each sector can be
verified by issuing DPB, SPB and SPB Lock bit read commands.
● The unlock operation may fail if the password provided by password unlock command does not match the
previously entered password. It causes the same result when a programming operation is performed on a
protected sector. The P_ERR bit is set to 1 and the WIP Bit remains set.
● It is not allowed to execute the Password Unlock command faster than every 100us ± 20us. The reason behind it
is to make it impossible to hack into the system by running through all the combinations of a set of 64-bit password (58
million years). To verify if the device has completed the password unlock command and is available to process
a new password command, the Read Status Register command is needed to read the WIP bit. When a valid
password is provided the password unlock command does not insert the 100us delay before returning the WIP
bit to zero.
● It is not feasible to set the SPB Lock bit if the password is missing after the Password Mode is selected.
Password Register (PASS)
Field
Name
Description
Bits
Function Type
Default State
Non-volatile OTP storage of 64 bit password. The
password is no longer readable after the password
protection mode is selected by programming Lock
register bit 2 to zero.
Hidden
Password
63 to 0 PWD
OTP FFFFFFFFFFFFFFFFh
P/N: PM1795
REV. 1.0, OCT. 23, 2012
72
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