Quad LVDS Line Driver
C
L
OUT_+
OUT_ +
OUT_ -
R /2
L
IN_
V
IN_
CC
R
L
GENERATOR
V
OS
V
OD
GND
R /2
L
50Ω
C
L
OUT_-
Figure 2. Driver Propagation Delay and Transition Time Test
Circuit
Figure 1. Driver V
and V Test Circuit
OS
OD
3V
1.5V
1.5V
IN_
0
t
t
PHLD
PLHD
OUT_ -
OUT_+
V
OH
OL
0 DIFFERENTIAL
80%
0
V
80%
-)
0
V
DIFF
= (V
+) - (V
OUT_
OUT_
0
50%
20%
V
DIFF
20%
t
t
THL
TLH
Figure 3. Driver Propagation Delay and Transition Time Waveforms
C
L
OUT_+
V
CC
IN_
R
R
L/2
GND
+1.2V
EN
EN
GENERATOR
L/2
50Ω
OUT_-
1/4 MAX9124
C
L
Figure 4. Driver High-Impedance Delay Test Circuit
6
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
