Quad LVDS Line Driver
Typical Operating Characteristics
(T = +25°C)
A
SINGLE-ENDED OUTPUT VOLTAGE
vs. LOAD RESISTANCE
SINGLE-ENDED OUTPUT VOLTAGE vs.
LOAD RESISTANCE
(R = 50Ω TO 400Ω)
L
(R = 0 TO 7kΩ)
L
2.10
1.90
1.70
1.50
1.30
1.10
0.90
0.70
0.50
0.30
2.40
2.20
2.00
1.80
1.60
1.40
1.20
1.00
0.80
OUT_+
OUT_-
D
+
OUT
V
= +3.6V
CC
V
CC
= +3.6V
CC
_V = +3.0V
CC
_V = +3.0V
0.60
0.40
0.20
D
-
OUT
0
50 100 150 200 250 300 350 400
0
1000 2000 3000 4000 5000 6000 7000
R (Ω)
R (Ω)
L
L
Pin Description
PIN
NAME
IN_
FUNCTION
1, 7, 9, 15
2, 6, 10, 14
3, 5, 11, 13
LVTTL/LVCMOS Driver Inputs
Noninverting LVDS Driver Outputs
Inverting LVDS Driver Outputs
OUT_+
OUT_-
Driver Enable Inputs. The driver is disabled and in high impedance when EN is low and EN is high.
For other combinations of EN and EN, the outputs are active.
4, 12
EN, EN
8
GND
Ground
16
V
Power-Supply Input. Bypass V
to GND with 0.1µF and 0.001µF ceramic capacitors.
CC
CC
4
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