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MAX791CPE 参数 Datasheet PDF下载

MAX791CPE图片预览
型号: MAX791CPE
PDF下载: 下载PDF文件 查看货源
内容描述: 微处理器监控电路 [Microprocessor Supervisory Circuit]
分类和应用: 电源电路电源管理电路微处理器光电二极管监控
文件页数/大小: 20 页 / 147 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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Microprocessor Supervisory Circuit
______________________________________________________________Pin Description
PIN
1
2
3
4
5
NAME
VBATT
V
OUT
V
CC
GND
BATT ON
–—
—–
PFO
PFI
FUNCTION
Backup-Battery Input. Connect to external battery or capacitor and charging circuit.
Output Supply Voltage. V
OUT
connects to V
CC
when V
CC
is greater than VBATT and V
CC
is above the reset
threshold. When V
CC
falls below VBATT and V
CC
is below the reset threshold, V
OUT
connects to VBATT.
Connect a 0.1µF capacitor from V
OUT
to GND.
Input Supply Voltage—+5V input
Ground. 0V reference for all signals
Battery On Output. Goes high when V
OUT
switches to VBATT. Goes low when V
OUT
switches to V
CC
. Connect
the base of a PNP through a current-limiting resistor to BATT ON for V
OUT
current requirements greater than
250mA.
–—
—–
Power-Fail Output. This is the output of the power-fail comparator. PFO goes low when PFI is less than 1.25V.
This is an uncommitted comparator, and has no effect on any other internal circuitry.
Power-Fail Input. This is the noninverting input to the power-fail comparator. When PFI is less than 1.25V,
–—
—–
PFO goes low. Connect PFI to GND or V
OUT
when not used.
Set Watchdog-Timeout Input. Connect this input to V
OUT
to select the default 1.6sec watchdog timeout period.
Connect a capacitor between this input and GND to select another watchdog-timeout period. Watchdog-timeout
period = 2.1 x (capacitor value in nF) ms.
Manual-Reset Input. This input can be tied to an external momentary pushbutton switch, or to a logic gate out-
–——
— —–
–—
–—
put. RESET remains low as long as MR is held low and for 200ms after MR returns high.
– ——— –
— ——
LOW LINE Output goes low when V
CC
falls to 150mV above the reset threshold. The output can be used to gen-
erate an NMI if the unregulated supply is inaccessible.
Watchdog Input. WDI is a three-level input. If WDI remains either high or low for longer than the watchdog time-
–— –
–— –
out period, WDO goes low. WDO remains low until the next transition at WDI. Leaving WDI unconnected disables
the watchdog function. WDI connects to an internal voltage divider between V
OUT
and GND, which sets it to mid-
supply when left unconnected.
––
––
––
Chip-Enable Output. CE OUT goes low only when CE IN is low and V
CC
is above the reset threshold. If CE IN is
––
––
low when reset is asserted, CE OUT will stay low for 15µs or until CE IN goes high, whichever occurs first.
Chip-Enable Input. The input to chip-enable gating circuit. Connect to GND or V
OUT
if not used.
–— –
Watchdog Output. WDO goes low if WDI remains— – high or low longer than the watchdog—
–— –
– either
–—timeout period.
WDO returns high on the next transition at WDI. WDO remains high if WDI is unconnected. WDO is also high
–——
— —–
when RESET is asserted.
–——
— —–
–——
— —–
RESET Output goes low whenever V
CC
falls below the reset threshold. RESET will remain low for typically 200ms
after V
CC
crosses the reset threshold on power-up.
–— —
—–
Watchdog-Pulse Output. Upon the absence of a transition at WDI, WDPO will pulse low for a minimum of 1ms.
–— —
—–
–— –
WDPO precedes WDO by 70ns.
MAX791
6
7
8
SWT
9
–—
MR
– ——— –
— ——
LOW LINE
10
11
WDI
12
13
14
––
CE OUT
––
CE IN
–— –
WDO
–——
— —–
RESET
–— —
—–
WDPO
15
16
_______________________________________________________________________________________
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