Microprocessor Supervisory Circuit
MAX791
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 4.75V to 5.5V, VBATT = 2.8V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
WDI Threshold Voltage
(Note 4)
WDI Input Current
POWER-FAIL COMPARATOR
PFI Input Threshold
PFI Leakage Current
–—
—–
PFO Output Voltage
–—
—–
PFO Short-Circuit Current
–—
—–
PFI-to-PFO Delay
CHIP-ENABLE GATING
––
—
CE IN Leakage Current
––
—
––
—
CE IN-to-CE OUT Resistance
(Note 5)
––
—
CE OUT Short-Circuit Current
(Reset Active)
––
—
—
–
CE IN-to-CE OUT Propagation
Delay (Note 6)
––
—
CE OUT Output Voltage High
(Reset Active)
–—— – –
— —– —
RESET CE OUT Delay
-to-
MANUAL RESET INPUT
–—
–
MR Minimum Pulse Width
–——
— —–
–—
–
MR -to -RESET
Propagation Delay
–—
–
MR Threshold
–—
–
MR Pull-Up Current
I
SINK
= 3.2mA
I
SOURCE
= 1µA, V
CC
= 5V
Output sink current
Output source current
V
IN
= -20mV, V
OD
= 15mV
V
IN
= 20mV, V
OD
= 15mV
Disabled mode
Enabled mode
––
—
Disabled mode, CE OUT = 0V
50Ω source impedance driver, C
LOAD
= 50pF
V
CC
= 5V, I
OUT
= -100µA
V
CC
= 0V, VBATT = 2.8V, I
OUT
= 1µA
Power down
3.5
2.7
15
0.1
1
3.5
60
15
15
55
±0.005
75
0.75
6
±1
150
2.0
10
100
V
CC
= 5V
1.20
1.25
±0.01
1.30
±25
0.4
V
nA
V
mA
µA
µs
V
IH
V
IL
WDI = 0V
WDI = V
OUT
-50
-10
20
50
CONDITIONS
MIN
0.75 x V
CC
0.8
TYP
MAX
UNITS
V
µA
µA
Ω
mA
ns
V
µs
25
15
7
µs
µs
V
250
µA
V
CC
= 5V
–—
–
MR = 0V
1.25
23
Note 1:
Either V
CC
or VBATT can go to 0V, if the other is greater than 2.0V.
Note 2:
The supply current drawn by the MAX791 from the battery (excluding I
OUT
) typically goes to 10µA when
(VBATT - 1V) < V
CC
< VBATT. In most applications, this is a brief period as V
CC
falls through this region.
Note 3:
"+" = battery-discharging current, "-" = battery-charging current.
Note 4:
WDI is internally connected to a voltage divider between V
OUT
and GND. If unconnected, WDI is driven to 1.6V (typ),
disabling the watchdog function.
—
–
—
–
Note 5:
The chip-enable resistance is tested with V
CC
= 4.75V V
– E IN
= V
CE OUT
= V
CC
/ 2.
C
––
—
––
—
Note 6:
The chip-enable propagation delay is measured from the 50% point at CE IN to the 50% point at CE OUT.
4
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