+5 V, Lo w -P o w e r, Vo lt a g e -Ou t p u t ,
S e ria l 1 2 -Bit DACs
18/MAX539
CS CLR DIN DOUT REFOUT V
V
SS
DD
POSITIVE OFFSET
2.048V
SIGNAL
IN
REFIN
VOUT
4
3
2
1
0
INVERTED
R-2R DAC
NEGATIVE OFFSET
2R
2R
RFB
BIPOFF
MAX531
1
2
3
4
5
6 7 8
DAC CODE (LSB)
Figure 10. Single-Supply Offset
Figure 9. MAX531 Connected as Four-Quadrant Multiplier. The
unused REFOUT is connected to V
.
DD
AC Co n s id e ra t io n s
ANALOG GROUND PLANE
Digital Feedthrough
High-speed serial data at any of the digital input or output
pins may couple through the DAC package and cause
internal stray capacitance to appear at the DAC output as
noise, even though CS is held high (see Typical Operating
Characteristics). This digital feedthrough is tested by hold-
ing CS high, transmitting 555 hex from DIN to DOUT.
0.1µF
1
2
3
4
5
6
7
14
13
12
11
10
9
Analog Feedthrough
Because of internal stray capacitance, higher frequency
analog input signals may couple to the output as shown in
the Analog Feedthrough vs. Frequency graph in the
Typical Operating Characteristics. It is tested by holding
CS high, setting the DAC code to all 0s, and sweeping
REFIN.
0.1µF
8
(a) MAX531 BYPASSING
1
8
7
6
5
2
3
4
0.1µF
(b) MAX538/MAX539 BYPASSING
Figure 11. Power-Supply Bypassing
______________________________________________________________________________________ 13