+5 V, Lo w -P o w e r, Vo lt a g e -Ou t p u t ,
S e ria l 1 2 -Bit DACs
DIN DOUT SCLK CS
REFIN
CLR
DIN SCLK CS DOUT
VOUT
REFIN
INVERTED
R-2R DAC
VOUT
INVERTED
R-2R DAC
REFOUT
2R
2R
2R
RFB
2.048V
MAX531
V
CONNECT BIPOFF
TO VOUT FOR G = 1,
TO AGND FOR G = 2,
OR TO REFIN FOR
BIPOLAR GAIN
BIPOFF
2R
MAX538
MAX539
AGND DGND
V
SS
MAX539
ONLY
DD
0.1µF
0.1µF
+5V
0V TO -5V
AGND
V
DD
33µF
+5V
0.1µF
Figure 3b. MAX538/MAX539 Typical Operating Circuit
Figure 3a. MAX531 Typical Operating Circuit
supplies in this mode. In this range, 1LSB = (2)(V
)
Da is y-Ch a in in g De vic e s
REFIN
-12
-11
(2 ) = (V
)(2 ). The MAX539 is internally config-
REFIN
The serial output, DOUT, allows cascading of two or
more DACs . The d a ta a t DIN a p p e a rs a t DOUT,
delayed by 16 clock cycles plus one clock width. For
low p owe r, DOUT is a CMOS outp ut tha t d oe s not
require an external pull-up resistor. DOUT does not go
into a high-impedance state when CS is high. DOUT
changes on SCLK’s falling edge when CS is low. When
CS is high, DOUT remains in the state of the last data
bit.
ured for unipolar gain = +2 operation.
18/MAX539
Bip o la r Co n fig u ra t io n
A bipolar range is set up by connecting BIPOFF to
REFIN a nd RFB to VOUT, a nd op e ra ting from d ua l
(±5V) supplies (Figure 8). Table 3 shows the DAC-latch
c onte nts (inp ut) vs . VOUT (outp ut). In this ra ng e ,
-11
1LSB = V
(2 ).
REFIN
Fo u r-Qu a d ra n t Mu lt ip lic a t io n
Any number of MAX531/MAX538/MAX539 DACs can
b e d a is y-c ha ine d b y c onne c ting the DOUT of one
device to the DIN of the next device in the chain. For
The MAX531 can be used as a four-quadrant multiplier
by connecting BIPOFF to REFIN and RFB to VOUT,
using (1) an offset binary digital code, (2) bipolar power
supplies, using dual power supplies, and (3) a bipolar
proper timing, ensure that t (CS low to SCLK high) is
CL
greater than t
+ t
.
DO
DS
analog input at REFIN within the range V + 2V to V
SS
DD
Un ip o la r Co n fig u ra t io n
The MAX531 is configured for a gain of +1 (0V to V
unipolar output) by connecting BIPOFF and RFB to
VOUT (Figure 6). The converter operates from either sin-
gle or dual supplies in this configuration. See Table 1 for
- 2V, as shown in Figure 9.
REFIN
In general, a 12-bit DAC’s output is (D) (V
where “G” is the gain (+1 or +2) and “D” is the binary
representation of the digital input divided by 2
4096. This formula is precise for unipolar operation.
However, for bipolar, offset binary operation, the MSB is
really a polarity bit. No resolution is lost, as there are
the same number of steps. The output voltage, howev-
er, has been shifted from a range of, for example, 0V to
4.096V (G = +2) to a range of -2.048V to +2.048V.
(G),
REFIN)
12
or
the DAC-latch contents (input) vs. the analog VOUT
-12
(outp ut). In this ra ng e , 1LSB = V
(2
). The
REFIN
MAX538 is internally configured for unipolar gain = +1
operation.
A gain of +2 (0V to 2V
unipolar output) is set up
REFIN
by connecting BIPOFF to AGND and RFB to VOUT
(Figure 7). Table 2 shows the DAC-latch contents vs.
VOUT. The MAX531 operates from either single or dual
Keep in mind that when using the DAC as a four-quad-
rant multiplier, the scale is skewed. Negative full scale
is -V
, while positive full scale is +V
- 1LSB.
REFIN
REFIN
10 ______________________________________________________________________________________
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