SPI/Microwire-Compatible
UART in QSOP-16
______________________________________________________________Pin Description
PIN
QSOP
1
2
3
4
6
7
8
9
10
11
13
14
15
16
5, 12
DIP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
—
NAME
DIN
DOUT
SCLK
CS
IRQ
SHDN
GND
X2
X1
CTS
RTS
RX
TX
V
CC
N.C.
FUNCTION
SPI/Microwire Serial-Data Input. Schmitt-trigger input.
SPI/Microwire Serial-Data Output. High impedance when
CS
is high.
SPI/Microwire Serial-Clock Input. Schmitt-trigger input.
Active-Low Chip-Select Input. DOUT goes high impedance when
CS
is high.
IRQ,
TX, and
RTS
are always active. Schmitt-trigger input.
Active-Low Interrupt Output. Open-drain interrupt output to microprocessor.
Hardware-Shutdown Input. When shut down (SHDN = 0), the oscillator turns off immediately
without waiting for the current transmission to end, reducing supply current to just leakage
currents.
Ground
Crystal Connection. Leave X2 unconnected for external clock. See
Crystal-Oscillator
Operation—X1, X2 Connection
section.
Crystal Connection. X1 also serves as an external clock input. See
Crystal-Oscillator
Operation—X1, X2 Connection
section.
General-Purpose Active-Low Input. Read via the
CTS
register bit; often used for RS-232 clear-
to-send input (Table 1).
General-Purpose Active-Low Output. Controlled by the
RTS
register bit. Often used for
RS-232 request-to-send output or RS-485 driver enable.
Asynchronous Serial-Data (receiver) Input. The serial information received from the modem or
RS-232/RS-485 receiver. A transition on RX while in shutdown generates an interrupt (Table 5).
Asynchronous Serial-Data (transmitter) Output
Positive Supply Pin (2.7V to 5.5V)
No Connection. Not internally connected.
MAX3100
_______________Detailed Description
The MAX3100 universal asynchronous receiver trans-
mitter (UART) interfaces the SPI/Microwire-compatible,
synchronous serial data from a microprocessor (µP) to
asynchronous, serial-data communication ports (RS-
232, RS-485, IrDA). Figure 2 shows the MAX3100 func-
tional diagram.
The MAX3100 combines a simple UART and a baud-rate
generator with an SPI interface and an interrupt genera-
tor. Configure the UART by writing a 16-bit word to a
write-configuration register, which contains the baud rate,
data-word length, parity enable, and enable of the 8-word
receive first-in/first-out (FIFO). The write configuration
selects between normal UART timing and IrDA timing,
controls shutdown, and contains 4 interrupt mask bits.
Transmit data by writing a 16-bit word to a write-data
register, where the last 7 or 8 bits are actual data to be
transmitted. Also included is the state of the transmitted
parity bit (if enabled). This register controls the state of
the
RTS
output pin. Received words generate an inter-
rupt if the receive-bit interrupt is enabled.
Read data from a 16-bit register that holds the oldest
data from the receive FIFO, the received parity data,
and the logic level at the
CTS
input pin. This register
also contains a bit that is the framing error in normal
operation and a receive-activity indicator in shutdown.
The baud-rate generator determines the rate at which the
transmitter and receiver operate. Bits B0 to B3 in the
write-configuration register determine the baud-rate divi-
sor (BRD), which divides down the X1 oscillator frequen-
cy. The baud clock is 16 times the data rate (baud rate).
The transmitter section accepts SPI/Microwire data, for-
mats it, and transmits it in asynchronous serial format
from the TX output. Data is loaded into the transmit-
buffer register from the SPI/Microwire interface. The
MAX3100 adds start and stop bits to the data and
clocks the data out at the selected baud rate (Table 7).
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5
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
