Notebook CPU Step-Down Controller for Intel
-
Mobile Voltage Positioning (IMVP II)
age rating rather than by capacitance value (this is true
of tantalums, OS-CONs, and other electrolytics).
V
V
− V
OUT IN
OUT
(
)
I
= I
When using low-capacity filter capacitors such as
ceramic or polymer types, capacitor size is usually
RMS LOAD
V
IN
determined by the capacity needed to prevent V
SAG
For most applications, nontantalum chemistries (ceramic
or OS-CON) are preferred due to their resistance to
inrush surge currents typical of systems with a switch
or a connector in series with the battery. If the
MAX1718 is operated as the second stage of a two-
stage power-conversion system, tantalum input capaci-
tors are acceptable. In either configuration, choose an
input capacitor that exhibits less than +10°C tempera-
ture rise at the RMS input current for optimal circuit
longevity.
and V
from causing problems during load tran-
SOAR
sients. Generally, once enough capacitance is added
to meet the overshoot requirement, undershoot at the
rising load edge is no longer a problem (see the V
SAG
equation in the Design Procedure section). The amount
of overshoot due to stored inductor energy can be cal-
culated as:
2
L× I
PEAK
V
≈
SOAR
2 × C × V
OUT
Power MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
(>12A) when using high-voltage (>20V) AC adapters.
Low-current applications usually require less attention.
where I
is the peak inductor current.
PEAK
Output Capacitor Stability
Considerations
Stability is determined by the value of the ESR zero rela-
tive to the switching frequency. The voltage-positioned
circuit in this data sheet has the ESR zero frequency low-
ered due to the external resistor in series with the output
capacitor ESR, guaranteeing stability. For a voltage-posi-
tioned circuit, the minimum ESR requirement of the output
capacitor is reduced by the voltage-positioning resistor
value.
The high-side MOSFET must be able to dissipate the
resistive losses plus the switching losses at both
V
and V
. Calculate both of these sums.
IN(MAX)
IN(MIN)
Ideally, the losses at V
to the losses at V
should be roughly equal
IN(MIN)
, with lower losses in between.
IN(MAX)
If the losses at V
losses at V
Conversely, if the losses at V
higher than the losses at V
are significantly higher than the
IN(MIN)
, consider increasing the size of Q1.
IN(MAX)
are significantly
IN(MAX)
The boundary condition of instability is given by the fol-
lowing equation:
, consider reducing
IN(MIN)
the size of Q1. If V does not vary over a wide range,
IN
(R
+ R ) ✕ C
DROOP OUT
≥ 1 / (2 ✕ f )
SW
ESR
the minimum power dissipation occurs where the resis-
tive losses equal the switching losses.
where R
is the effective value of the voltage-
DROOP
positioning resistor (Figure 1, R8). For good phase mar-
gin, it is recommended to increase the equivalent RC
time constant by a factor of two. The standard applica-
Choose a low-side MOSFET (Q2) that has the lowest
possible R
, comes in a moderate-sized package
DS(ON)
(i.e., two or more SO-8s, DPAKs or D2PAKs), and is rea-
sonably priced. Ensure that the MAX1718 DL gate dri-
ver can drive Q2; in other words, check that the dv/dt
caused by Q1 turning on does not pull up the Q2 gate
due to drain-to-gate capacitance, causing cross-con-
duction problems. Switching losses aren’t an issue for
the low-side MOSFET since it’s a zero-voltage switched
device when used in the buck topology.
tion circuit (Figure 1) operating at 300kHz with C
=
OUT
= 5mΩ easily
1320µF, R
= 2.5mΩ, and R
ESR
DROOP
meets this requirement. In some applications, the C
OUT
and R
values are sufficient to guarantee stability
DROOP
even if R
= 0.
ESR
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output voltage ripple envelope for over-
shoot and ringing. Don’t allow more than one cycle of
ringing after the initial step-response under/overshoot.
MOSFET Power Dissipation
The high-side MOSFET power dissipation due to resis-
tance is:
Input Capacitor Selection
V
V
2
OUT
PD (Q1 Resistive) =
× I
× R
The input capacitor must meet the ripple current
LOAD DS(ON)
IN
requirement (I
) imposed by the switching currents
defined by the following equation:
RMS
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R
required to stay within package
DS(ON)
26 ______________________________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
