Notebook CPU Step-Down Controller for Intel
-
Mobile Voltage Positioning (IMVP II)
Table 6. Operating Mode Truth Table
DL
MODE
COMMENT
Low-power shutdown state. DL is forced to V , enforcing
SKP/SDN
DD
GND
High
Shutdown
OVP. I
+ I
= 2µA typ.
CC
DD
Test mode with faults disabled and fault latches cleared, includ-
ing thermal shutdown. Otherwise, normal operation, with auto-
matic PWM/PFM switchover for pulse-skipping at light loads.
12V to 15V
Open
Switching
No Fault
Low-noise operation with no automatic switchover. Fixed-fre-
quency PWM action is forced regardless of load. Inductor cur-
rent reverses at light load levels.
Switching
Switching
High
Run (PWM, low noise)
Run (PFM/PWM)
Fault
Operation with automatic PWM/PFM switchover for pulse-skip-
ping at light loads.
V
CC
Fault latch has been set by OVP, UVP, or thermal shutdown.
Device will remain in FAULT mode until V power is cycled or
V
CC
or Open
CC
SKP/SDN is forced low.
MOSFETs, and other critical heat-contributing com-
NO FAULT Test Mode
ponents. Modern notebook CPUs generally exhibit
The over/undervoltage protection features can compli-
cate the process of debugging prototype breadboards
since there are (at most) a few milliseconds in which to
determine what went wrong. Therefore, a test mode is
provided to disable the OVP, UVP, and thermal shut-
down features, and clear the fault latch if it has been
set. The PWM operates as if SKP/SDN were high (SKIP
mode). The NO FAULT test mode is entered by forcing
12V to 15V on SKP/SDN.
✕
I
= I
80%.
LOAD
LOAD(MAX)
3) Switching Frequency. This choice determines the
basic trade-off between size and efficiency. The opti-
mal frequency is largely a function of maximum input
voltage, due to MOSFET switching losses that are pro-
2
portional to frequency and V . The optimum frequen-
IN
cy is also a moving target, due to rapid improvements
in MOSFET technology that are making higher frequen-
cies more practical.
Design Procedure
4) Inductor Operating Point. This choice provides trade-
offs between size and efficiency. Low inductor val-
ues cause large ripple currents, resulting in the
smallest size, but poor efficiency and high output
noise. The minimum practical inductor value is one
that causes the circuit to operate at the edge of criti-
cal conduction (where the inductor current just touch-
es zero with every cycle at maximum load). Inductor
values lower than this grant no further size-reduction
benefit.
Firmly establish the input voltage range and maximum
load current before choosing a switching frequency
and inductor operating point (ripple-current ratio). The
primary design trade-off lies in choosing a good switch-
ing frequency and inductor operating point, and the fol-
lowing four factors dictate the rest of the design:
1) Input Voltage Range. The maximum value (V
)
IN(MAX)
must accommodate the worst-case high AC adapter
voltage. The minimum value (V ) must account
IN(MIN)
for the lowest battery voltage after drops due to con-
nectors, fuses, and battery selector switches. If there
is a choice at all, lower input voltages result in better
efficiency.
The MAX1718’s pulse-skipping algorithm initiates
skip mode at the critical conduction point. So, the
inductor operating point also determines the load-
current value at which PFM/PWM switchover occurs.
The optimum point is usually found between 20%
and 50% ripple current.
2) Maximum Load Current. There are two values to con-
sider. The peak load current (I
) deter-
LOAD(MAX)
mines the instantaneous component stresses and
filtering requirements, and thus drives output capaci-
tor selection, inductor saturation rating, and the
design of the current-limit circuit. The continuous load
5) The inductor ripple current also impacts transient-
response performance, especially at low V - V
IN
OUT
differentials. Low inductor values allow the inductor
current to slew faster, replenishing charge removed
from the output filter capacitors by a sudden load
current (I
) determines the thermal stresses and
thus drives the selection of input capacitors,
LOAD
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