Mu lt i-Ou t p u t , Lo w -No is e P o w e r-S u p p ly
Co n t ro lle rs fo r No t e b o o k Co m p u t e rs
Table 5. Low-Voltage Troubleshooting Chart
SYMPTOM
CONDITION
ROOT CAUSE
SOLUTION
Increase bulk output capacitance
per formula (see Low-Voltage
Operation section). Reduce inductor
value.
Sag or droop in V
step-load change
under
Low V -V
differential, <1.5V
Limited inductor-current
slew rate per cycle.
OUT
IN OUT
Dropout voltage is too high
(V follows V as V
decreases)
Reduce operation to 200kHz.
Reduce MOSFET on-resistance and
coil DCR.
Low V -V
differential, <1V
Maximum duty-cycle limits
exceeded.
IN OUT
OUT
IN
IN
Unstable—jitters between
different duty factors and
frequencies
Low V -V
differential, <0.5V
Normal function of internal
low-dropout circuitry.
Increase the minimum input voltage
or ignore.
IN OUT
Not enough duty cycle left
to initiate forward-mode
operation. Small AC current
in primary can’t store ener-
gy for flyback operation.
Reduce operation to 200kHz.
Reduce secondary impedances;
use a Schottky diode, if possible.
Stack secondary winding on the
main output.
Low V -V
IN OUT
Secondary output won’t
support a load
differential,
< 1.3 x V
V
(main)
OUT
IN
0–MAX1635
VL linear regulator is going
into dropout and isn’t provid-
ing good gate-drive levels.
Use a small 20mA Schottky diode
for boost diode D2. Supply VL from
an external source.
Poor efficiency
Low input voltage, <5V
Low input voltage, <4.5V
Won’t start under load or
quits before battery is
completely dead
Supply VL from an external source
other than V , such as the system
IN
+5V supply.
VL output is so low that it
hits the VL UVLO threshold.
where R
is the DC resistance of the coil, R
is
DC
DS(ON)
________________Ap p lic a t io n s In fo rm a t io n
the MOSFET on-resistance, and R
is the current-
SENSE
He a vy-Lo a d Effic ie n c y Co n s id e ra t io n s
The major efficiency-loss mechanisms under loads are,
in the usual order of importance:
sense resistor value. The R
term assumes identi-
DS(ON)
cal MOSFETs for the high-side and low-side switches,
because they time-share the inductor current. If the
MOSFETs aren’t identical, their losses can be estimat-
ed by averaging the losses according to duty factor.
• P(I2R) = I2R losses
• P(tran) = transition losses
• P(gate) = gate-charge losses
• P(diode) = diode-conduction losses
• P(cap) = capacitor ESR losses
3
PD(tran) = transition loss = V x I
x f x
x
IN LOAD
2
(V x C
/ I
) + 20ns
IN
RSS GATE
where C
is the reverse transfer capacitance of the
RSS
• P(IC) = losses due to the IC’s operating supply
high-side MOSFET (a data-sheet parameter), I
DH gate-driver peak output current (1.5A typical), and
20ns is the rise/fall time of the DH driver (20ns typical).
is the
GATE
supply current
Ind uc tor c ore los s e s a re fa irly low a t he a vy loa d s
because the inductor’s AC current component is small.
Therefore, they aren’t accounted for in this analysis.
Ferrite cores are preferred, especially at 300kHz, but
powdered cores, such as Kool-Mu, can work well.
P(gate) = qG x f x VL
where VL is the internal-logic-supply voltage (+5V), and qG
is the sum of the gate-charge values for low-side and high-
side switches. For matched MOSFETs, qG is twice the
Efficiency = P
/ P x 100%
IN
data-sheet value of an individual MOSFET. If V
is set to
OUT
OUT
less than 4.5V, replace VL in this equation with V
this case, efficiency can be improved by connecting VL to
an efficient 5V source, such as the system +5V supply.
. In
BATT
= P
/ (P
+ P
) x 100%
OUT
OUT
TOTAL
2
P
= P(I R) + P(tran) + P(gate) +
TOTAL
P(diode) + P(cap) + P(IC)
P(diode) = diode - conduction losses
2
2
P = (I R) = (I
) x (R
+ R
+ R
)
= I
x V
x t x f
LOAD
DC
DS(ON)
SENSE
LOAD
FWD D
22 ______________________________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
