Mu lt i-Ou t p u t , Lo w -No is e P o w e r-S u p p ly
Co n t ro lle rs fo r No t e b o o k Co m p u t e rs
systems can multiply the R
without hurting stability or transient response.
value by a factor of 1.5
where: V
= the minimum required rectified sec-
ondary output voltage
ESR
SEC
The output voltage ripple is usually dominated by the
filter capacitor’s ESR, and can be approximated as
V
FWD
= the forward drop across the secondary
rectifier
I
x R
. There is also a capacitive term, so the
RIPPLE
ESR
V
= the minimum value of the main
output voltage (from the Electrical
Characteristics)
OUT(MIN)
full equation for ripple in continuous-conduction mode
is V = I x [R + 1/(2 x π x f x
C
discontinuous, with high peaks and widely spaced
pulses, so the noise can actually be higher at light load
(compared to full load). In Idle Mode, calculate the out-
put ripple as follows:
NOISE (p -p )
RIPPLE
ESR
)]. In Idle Mode, the inductor current becomes
OUT
V
RECT
= the on-state voltage drop across the
synchronous rectifier MOSFET
V
SENSE
= the voltage drop across the sense
resistor
In positive-output applications, the transformer sec-
ondary return is often referred to the main output volt-
age, rather than to ground, to reduce the needed turns
ratio. In this case, the main output voltage must first be
0.02 x R
ESR
V
=
+
NOISE(p -p)
R
SENSE
0.0003 x Lx 1 / V
+1 / (V - V
)
]
[
OUT
IN OUT
) x C
OUT
subtracted from the secondary voltage to obtain V
.
SEC
2
(R
SENSE
S e le c t in g Ot h e r Co m p o n e n t s
0–MAX1635
MOSFET Switches
The high-current N-channel MOSFETs must be logic-level
types with guaranteed on-resistance specifications at
Tra n s fo rm e r De s ig n
(fo r Au x ilia ry Ou t p u t s On ly)
Buck-plus-flyback applications, sometimes called “cou-
pled-inductor” topologies, need a transformer to gener-
a te multip le outp ut volta g e s . Pe rforming the b a s ic
electrical design is a simple task of calculating turns
ratios and adding the power delivered to the secondary
to calculate the current-sense resistor and primary
inductance. However, extremes of low input-output dif-
ferentials, widely different output loading levels, and
high turns ratios can complicate the design due to par-
asitic transformer parameters such as interwinding
c a p a c ita nc e , s e c ond a ry re s is ta nc e , a nd le a ka g e
inductance. For examples of what is possible with real-
world tra ns forme rs , s e e the Ma ximum Se c ond a ry
Curre nt vs . Inp ut Volta g e g ra p h in the Typ ic a l
Operating Characteristics section.
V
GS
= 4.5V. Lower gate threshold specifications are bet-
ter (i.e., 2V max rather than 3V max). Drain-source break-
down voltage ratings must at least equal the maximum
input voltage, preferably with a 20% derating factor. The
best MOSFETs will have the lowest on-resistance per
nanocoulomb of gate charge. Multiplying R
x Q
DS(ON)
G
provides a good figure for comparing various MOSFETs.
Newer MOSFET process technologies with dense cell
structures generally perform best. The internal gate
drivers tolerate >100nC total gate charge, but 70nC is a
more practical upper limit to maintain best switching
times.
In high-current applications, MOSFET package power
dissipation often becomes a dominant design factor.
I2R power losses are the greatest heat contributor for
both high-side and low-side MOSFETs. I2R losses are
distributed between Q1 and Q2 according to duty fac-
tor (see the following equations). Generally, switching
los s e s a ffe c t only the up p e r MOSFET, s inc e the
Schottky rectifier clamps the switching node in most
cases before the synchronous rectifier turns on. Gate-
charge losses are dissipated by the driver and don’t
he a t the MOSFET. Ca lc ula te the te mp e ra ture ris e
according to package thermal-resistance specifications
to ensure that both MOSFETs are within their maximum
junction temperature at high ambient temperature. The
wors t-c a s e d is s ip a tion for the hig h-s id e MOSFET
oc c urs a t b oth e xtre me s of inp ut volta g e , a nd the
worst-case dissipation for the low-side MOSFET occurs
at maximum input voltage.
Power from the main and secondary outputs is com-
bined to get an equivalent current referred to the main
output voltage (see the Inductor Value section for para-
meter definitions). Set the current-sense resistor resis-
tor value at 80mV / I
.
TOTAL
P
= The sum of the output power from all outputs
TOTAL
I
= P
/ V
= The equivalent output cur-
TOTAL
TOTAL
OUT
rent referred to V
OUT
V
(V
- V
)
OUT IN(MAX)
OUT
L(primary) =
V
x f x I
x LIR
IN(MAX)
TOTAL
V
+ V
FWD
SEC
Turns Ratio N =
V
+ V
+ V
OUT(MIN)
RECT SENSE
20 ______________________________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
