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MAX1632EAI 参数 Datasheet PDF下载

MAX1632EAI图片预览
型号: MAX1632EAI
PDF下载: 下载PDF文件 查看货源
内容描述: 多路输出,低噪声电源控制器,用于笔记本电脑 [Multi-Output, Low-Noise Power-Supply Controllers for Notebook Computers]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管电脑信息通信管理
文件页数/大小: 28 页 / 240 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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Mu lt i-Ou t p u t , Lo w -No is e P o w e r-S u p p ly  
Co n t ro lle rs fo r No t e b o o k Co m p u t e rs  
0–MAX1635  
Cu rre n t -S e n s e Re s is t o r Va lu e  
The current-sense resistor value is calculated according  
to the worst-case-low current-limit threshold voltage  
(from the Electrical Characteristics table) and the peak  
inductor current:  
Byp a s s in g VL  
Bypass the VL output with a 4.7µF tantalum capacitor  
paralleled with a 0.1µF ceramic capacitor, close to the  
device.  
Ou t p u t Filt e r Ca p a c it o r Va lu e  
The output filter capacitor values are generally deter-  
mined by the ESR and voltage rating requirements, rather  
than actual capacitance requirements for loop stability. In  
other words, the low-ESR electrolytic capacitor that meets  
the ESR requirement usually has more output capaci-  
tance than is required for AC stability. Use only special-  
ized low-ESR capacitors intended for switching-regulator  
applications, such as AVX TPS, Sprague 595D, Sanyo  
OS-CON, or Nichicon PL series. To ensure stability, the  
capacitor must meet both minimum capacitance and  
maximum ESR values as given in the following equations:  
80mV  
R
=
SENSE  
I
PEAK  
Use I  
from the second equation in the Inductor  
PEAK  
Value section  
Use the calculated value of R  
to size the MOSFET  
SENSE  
switches and specify inductor saturation-current ratings  
according to the worst-case high-current-limit threshold  
voltage:  
120mV  
I
=
PEAK(MAX)  
R
V
(1 + V  
/ V  
)
SENSE  
REF  
OUT  
IN(MIN)  
C
R
>
OUT  
ESR  
V
x R  
x f  
SENSE  
Low-ind uc ta nc e re s is tors , s uc h a s s urfa c e -mount  
metal-film, are recommended.  
OUT  
R
x V  
OUT  
SENSE  
V
<
In p u t Ca p a c it o r Va lu e  
Connect low-ESR bulk capacitors and small ceramic  
capacitors (0.1µF) directly to the drains on the high-  
side MOSFETs. The bulk input filter capacitor is usually  
selected according to input ripple current requirements  
a nd volta g e ra ting , ra the r tha n c a p a c itor va lue .  
Electrolytic capacitors with low enough effective series  
resistance (ESR) to meet the ripple current requirement  
inva ria b ly ha ve s uffic ie nt c a p a c ita nc e va lue s .  
Aluminum e le c trolytic c a p a c itors , s uc h a s Sa nyo  
OS-CON or Nic hic on PL, a re s up e rior to ta nta lum  
types, which carry the risk of power-up surge-current  
fa ilure , e s p e c ia lly whe n c onne c ting to rob us t AC  
adapters or low-impedance batteries. RMS input ripple  
REF  
(can be multiplied by 1.5; see text below)  
These equations are worst case, with 45 degrees of  
p ha s e ma rg in to e ns ure jitte r-fre e , fixe d -fre q ue nc y  
op e ra tion a nd p rovid e a nic e ly d a mp e d outp ut  
response for zero to full-load step changes. Some cost-  
conscious designers may wish to bend these rules with  
less-expensive capacitors, particularly if the load lacks  
large step changes. This practice is tolerable if some  
b e nc h te s ting ove r te mp e ra ture is d one to ve rify  
acceptable noise and transient response.  
No well-defined boundary exists between stable and  
unstable operation. As phase margin is reduced, the  
first symptom is a bit of timing jitter, which shows up as  
blurred edges in the switching waveforms where the  
scope wont quite sync up. Technically speaking, this  
jitter (usually harmless) is unstable operation, since the  
duty factor varies slightly. As capacitors with higher  
ESRs are used, the jitter becomes more pronounced,  
and the load-transient output voltage waveform starts  
looking ragged at the edges. Eventually, the load-tran-  
sient waveform has enough ringing on it that the peak  
noise levels exceed the allowable output voltage toler-  
ance. Note that even with zero phase margin and gross  
instability present, the output voltage noise never gets  
current (I  
) is determined by the input voltage and  
RMS  
load current, with the worst case occurring at V = 2 x  
IN  
V
:
OUT  
V
(V - V  
)
OUT IN OUT  
I
= I  
x
RMS  
LOAD  
V
IN  
Therefore, when V is 2 x V  
:
IN  
OUT  
I
LOAD  
2
I
=
RMS  
Byp a s s in g V+  
Bypass the V+ input with a 4.7µF tantalum capacitor  
paralleled with a 0.1µF ceramic capacitor, close to the  
much worse than I  
x R  
(under constant loads).  
PEAK  
ESR  
Designers of RF communicators or other noise-sensi-  
tive analog equipment should be conservative and stay  
within the guidelines. Designers of notebook computers  
a nd s imila r c omme rc ia l-te mp e ra ture -ra ng e d ig ita l  
IC. A 10series resistor to V is also recommended.  
IN  
______________________________________________________________________________________ 19  
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