MAX11329–MAX11332
3Msps, 12-/10-Bit, 8-/16-Channel ADCs with
Post-Mux External Signal Conditioning Access
ELECTRICAL CHARACTERISTICS (MAX11329/MAX11330) (continued)
(V
= 2.35V to 3.6V, V
= 1.5V to 3.6V, f
= 3Msps, f
= 48MHz, 50% duty cycle, V
= V , T = -40NC to +125NC,
DD
OVDD
SAMPLE
SCLK
REF+ DD A
unless otherwise noted. Typical values are at T = +25NC.) (Note 2)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
-0.5dB below full-scale of 99.2432kHz
sine-wave input to the channel being
sampled; apply full-scale 69.2139kHz sine
wave signal to all 15 nonselected
input channels
Crosstalk
-88
dB
CONVERSION RATE
Power-Up Time
t
Conversion cycle, external clock
Internally clocked (Note 8)
2
Cycles
PU
Acquisition Time
t
52
ns
µs
ACQ
2.1
Conversion Time
t
CONV
Externally clocked, f
16 cycles (Note 8)
= 48MHz,
SCLK
333
ns
External Clock Frequency
Aperture Delay
f
0.48
48
MHz
ns
SCLK
8
Aperture Jitter
RMS
30
ps
ANALOG INPUT
Unipolar (single-ended and pseudo
differential)
0
V
REF+
Input Voltage Range
V
V
-V
REF+
/2
+V
INA
REF+
/2
RANGE bit set to 0
Bipolar (Note 9)
RANGE bit set to 1
-V
+V
REF+
REF+
V
+ 0.1
REF+
Absolute Input Voltage Range
Static Input Leakage Current
AIN+, AIN- relative to GND
-0.1
V
I
V
= V , GND
-0.1
1.5
FA
ILA
AIN_
DD
During acquisition time,
RANGE bit = 0 (Note 10)
15
Input Capacitance
C
pF
AIN
During acquisition time,
RANGE bit = 1 (Note 10)
7.5
EXTERNAL REFERENCE INPUT
REF- Input Voltage Range
V
-0.3
1
+1
V
V
REF-
V
DD
REF+ Input Voltage Range
REF+ Input Current
V
REF+
+50mV
V
V
= 2.5V, f
= 2.5V, f
= 3Msps
= 0Msps
110
0.1
FA
FA
REF+
REF+
SAMPLE
I
REF+
SAMPLE
DIGITAL INPUTS (SCLK, DIN, CS, CNVST)
V
OVDD
Input Voltage Low
Input Voltage High
V
V
V
IL
O0.25
V
OVDD
V
IH
O0.75
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6
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