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DS2431-A1 参数 Datasheet PDF下载

DS2431-A1图片预览
型号: DS2431-A1
PDF下载: 下载PDF文件 查看货源
内容描述: 1024位的1-Wire EEPROM用于汽车应用 [1024-Bit, 1-Wire EEPROM for Automotive Applications]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 21 页 / 220 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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1024-Bit, 1-Wire EEPROM  
for Automotive Applications  
DS243-A1  
16  
15  
2
POLYNOMIAL = X + X + X + 1  
1ST  
2ND  
3RD  
4TH  
5TH  
6TH  
7TH  
8TH  
STAGE  
STAGE  
STAGE  
STAGE  
STAGE  
STAGE  
STAGE  
STAGE  
0
1
2
3
4
5
6
7
X
X
X
X
X
X
X
X
9TH  
STAGE  
10TH  
STAGE  
11TH  
STAGE  
12TH  
STAGE  
13TH  
STAGE  
14TH  
STAGE  
15TH  
STAGE  
16TH  
STAGE  
8
9
10  
11  
12  
13  
14  
15  
16  
CRC OUTPUT  
X
X
X
X
X
X
X
X
X
INPUT DATA  
Figure 13. CRC-16 Hardware Description and Polynomial  
With the Read Scratchpad command, the CRC is gen-  
erated by first clearing the CRC generator and then  
shifting in the command code, the target addresses  
TA1 and TA2, the E/S byte, and the scratchpad data as  
they were sent by the DS2431-A1. The DS2431-A1  
transmits this CRC only if the reading continues through  
the end of the scratchpad. For more information on  
generating CRC values, refer to Application Note 27.  
Command-Specific 1-Wire Communication Protocol—Legend  
SYMBOL  
RST  
DESCRIPTION  
1-Wire reset pulse generated by master.  
PD  
1-Wire presence pulse generated by slave.  
Select  
Command and data to satisfy the ROM function protocol.  
Command "Write Scratchpad."  
WS  
RS  
Command "Read Scratchpad."  
CPS  
Command "Copy Scratchpad."  
RM  
Command "Read Memory."  
TA  
Target address TA1, TA2.  
TA-E/S  
Target address TA1, TA2 with E/S byte.  
<8–T2:T0 bytes>  
<Data to EOM>  
CRC-16  
FF Loop  
AA Loop  
Programming  
Transfer of as many bytes as needed to reach the end of the scratchpad for a given target address.  
Transfer of as many data bytes as are needed to reach the end of the memory.  
Transfer of an inverted CRC-16.  
Indefinite loop where the master reads FF bytes.  
Indefinite loop where the master reads AA bytes.  
Data transfer to EEPROM; no activity on the 1-Wire bus permitted during this time.  
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