DS2154
2.4 Line Interface Pins
PIN
NAME
FUNCTION
Master Clock Input. A 2.048MHz (±50ppm) clock source with TTL levels is applied at
this pin. This clock is used internally for both clock/data recovery and for jitter
attenuation. A quartz crystal of 2.048MHz may be applied across MCLK and XTALD
instead of the TTL level clock source.
21
MCLK
Quartz Crystal Driver. A quartz crystal of 2.048MHz may be applied across MCLK
22
13
XTALD and XTALD instead of a TTL level clock source at MCLK. Leave open circuited if a
TTL clock source is applied at MCLK.
Eight Times Clock. A 16.384MHz clock that is frequency locked to the 2.048MHz
clock provided from the clock/data recovery block (if the jitter attenuator is enabled on
8XCLK
the receive side) or from the TCLKI pin (if the jitter attenuator is enabled on the transmit
side). Can be internally disabled via the TEST2 register if not needed.
Line Interface Connect. Tie low to separate the line interface circuitry from the
framer/formatter circuitry and activate the TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/
RCLKI pins. Tie high to connect the line interface circuitry to the framer/formatter
12
LIUC
circuitry and deactivate the TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/RCLKI pins. When
LIUC is tied high, the TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/RCLKI pins should be
tied low.
RTIP,
RRING
TTIP,
Receive Tip and Ring. Analog inputs for clock recovery circuitry. These pins connect
via a 1:1 transformer to the E1 line. See Section 13 for details.
16, 17
29, 32
Transmit Tip and Ring. Analog line driver outputs. These pins connect via a 1:1.15 or
1:1.36 step-up transformer to the E1 line. See Section 13 for details.
TRING
2.5 Supply Pins
PIN
NAME
FUNCTION
44, 61,
81, 83
DVDD
Digital Positive Supply. 5.0V ±5%. Should be tied to the RVDD and TVDD pins.
Receive Analog Positive Supply. 5.0V ±5%. Should be tied to the DVDD and TVDD
18
RVDD
TVDD
DVSS
pins.
Transmit Analog Positive Supply. 5.0V ±5%. Should be tied to the RVDD and DVDD
31
pins.
45, 60,
80, 84
19, 20,
24
Digital Signal Ground. Should be tied to the RVSS and TVSS pins.
RVSS
TVSS
Receive Analog Signal Ground. 0V. Should be tied to the DVSS and TVSS pins.
Transmit Analog Ground. 0V. Should be tied to the RVSS and DVSS pins.
30
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