DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
7.4. FAS Error Counter
FAS Count Register 1 (FASCR1) is the most significant word and FASCR2 is the least significant word
of a 12–bit counter that records word errors in the Frame Alignment Signal in time slot 0. This counter is
disabled when RLOS is high. FAS errors will not be counted when the framer is searching for FAS
alignment and/or synchronization at either the CAS or CRC4 multiframe level. Since the maximum FAS
word error count in a one second period is 4000, this counter cannot saturate.
FASCR1: FAS ERROR COUNT REGISTER 1 (Address = 02 Hex)
FASCR2: FAS ERROR COUNT REGISTER 2 (Address = 04 Hex)
(MSB)
FAS11
FAS5
(LSB)
FAS10
FAS4
FAS9
FAS3
FAS8
FAS2
FAS7
FAS1
FAS6
FAS0
(Note 1) (Note 1) FASCR1
(Note 2) (Note 2) FASCR2
SYMBOL POSITION
NAME AND DESCRIPTION
MSB of the 12-Bit FAS Error Count
LSB of the 12-Bit FAS Error Count
FAS11
FAS0
FASCR1.7
FASCR2.2
Note 1: The lower two bits of FASCR2 at address 04 are the most significant bits of the 10-bit E-Bit counter.
Note 2: The lower two bits of FASCR1 at address 02 are the most significant bits of the 10-bit CRC4 error counter.
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