DA6512.003
2 December, 2016
CS AND CR CAPACITOR MATRIX REGISTERS (E3/63HEX AND E4/64HEX
)
There are two internal capacitor matrices that add
capacitance in parallel to the sensor capacitor (CS)
and the reference capacitor (CR). These offset
capacitances are used to adjust the sensor signal to
an optimal range. Each capacitor matrix has a
selectable capacitance from 0pF up to 22pF in
typical 86fF steps. The three sigma process
variation of the capacitor matrix capacitance is
storing the trim value. Also the CR capacitor matrix
register (E4/64HEX) has corresponding EEPROM
byte (C4/44HEX) for storing the trim value. After
finding suitable CS and CR capacitor matrix register
values the trim values can be stored in the
corresponding non-volatile EEPROM addresses.
In normal operating mode these trim values are
automatically read from the EEPROM during each
conversion start. See also table 10 Trimming control
Register (ED/6DHEX) for other operating modes.
±10%.The CS capacitor matrix register (E3/63HEX
)
has a corresponding EEPROM byte (C3/43HEX) for
Table 4. CS capacitor matrix register (E3/63HEX), EEPROM (C3/43HEX
)
Bit Number
Bit Name
Description
Value
Function
7-0
OCDACS
CDAC control bits
0HEX…FFHEX
CS offset trimming
Table 5. CR capacitor matrix register (E4/64HEX), EEPROM (C4/44HEX
)
Bit Number
Bit Name
Description
Value
Function
7-0
OCDACR
CDAC control bits
0HEX…FFHEX
CR offset trimming
GAIN REGISTER (E5/65HEX
)
The gain register sets the excitation signal level for
the capacitive sensor. The eight bits (GRDAC) can
be programmed to values between 0 and 255.
Together with the CS and the CR capacitor matrix
trim parameters it’s used to adjust the sensor signal
to an optimal range. The goal is to get a maximum
dynamic range and keep the signal within linear
input range of the -modulator. This condition is
met when the signal minimum and maximum
covers the whole linear input range.
In this mode the gain register value GRDAC sets
the VS level.
VS= (VDD/1.8V)*(33mV+GRDAC*2.88mV)
VR = (VDD/1.8V)*144mV
CS = External sensor + CS matrix capacitance
CR = External reference + CR capacitance
CREF = 6pF, three sigma variation ±10%
In case of capacitance ratio measurement mode;
CR VR
QAVE 1
The output of MAS6512 has the following
relationship to the ΔΣ-modulator output:
CS VS
In this mode the gain register value GRDAC sets
the VS level.
CODE QAVE CODEFS
VS = (VDD/1.8V)*GRDAC*0.52mV
VR= (VDD/1.8V)*100.8mV
CS = External sensor + CS matrix capacitance
CR = External reference + CR capacitance
QAVE is the average measurement result (from the
over sampling) of the ΔΣ-modulator and varies from
0 to 1. The CODEFS is the maximum output code
which depends on OSR. See page 5 Full output
code range specification in the Electrical
characteristics table. The linear signal range of the
modulator is from QAVE=10% to QAVE =90%.
The gain register (E5/65HEX) has a corresponding
EEPROM byte (C5/45HEX). After finding a suitable
gain register value it can be stored in the EEPROM
memory. In normal operating mode the gain trim
value is read automatically from the EEPROM
during each conversion start.
In case of capacitance difference measurement
mode;
1
2
CS CR
CREF
VS
QAVE
2VR
Table 6. Gain register (E5/65HEX), EEPROM (C5/45HEX
)
Bit Number
Bit Name
Description
Value
Function
7-0
GRDAC
RDAC control bits
0HEX…FFHEX
Gain control by sensor excitation signal
level control
13 (32)
MAS [ MICRO ANALOG SYSTEMS ]
