DA6505.005
11 June 2018
TRIM AND TEST REGISTER (FA/7AHEX
)
Trim and test register (FA/7AHEX) is for trimming and
testing purposes. In normal operation the Trim and
test register default value is 00HEX. See table 6.
from the EEPROM. The rest of the trim data is taken
from the four trim registers in addresses FB/7BHEX
…FE/7EHEX. See tables 7-10. Trimming using
registers can be done much faster than when using
EEPROM since register write is much faster than the
slower EEPROM write. After finding optimal trim
values to these four trim registers they need to be
stored into the corresponding four EEPROM trim
data addresses 3B/3BHEX …3E/3EHEX. See table 1.
In normal operating mode (TRIM=00) all the stored
trimming settings will be automatically read to
registers from the EEPROM memory in the
beginning of each measurement.
The SOSC bit selects between internal and external
oscillator clock signal. By default the internal clock
oscillator is selected (SOSC=0). The external
oscillator signal can be also selected (SOSC=1) but
this is only for testing purpose.
The STEST bits are for selecting test signals to the
SDO pin. In normal operation there is no test output
selected (STEST=0000) which is the default setting.
Other settings (STEST<>0000) select different
signals to the SDO pin and are also only for testing
purpose.
The TRIM=11 setting selects taking all trim data from
registers. This is only for internal clock oscillator
trimming purpose and not needed since the internal
clock oscillator is factory trimmed.
The TRIM bits select source of the trim data. By
default setting (TRIM=00) all trim data is taken from
the EEPROM. This is proper operating mode of a
trimmed pressure module.
The SCALC bit selects input data source for the IIR
low pass filter. By default SCALC=0 which selects
data from the A/D conversion results. However
SCALC=1 selects to take calculation input data from
TRIM=01 or 10 setting selects Trimming mode which
is used in the trimming of the temperature sensor,
AFE gains and ADC offsets of the temperature and
pressure measurements. In this mode only internal
factory trimmed clock oscillator trim data is taken
the Test input data registers (F7/77HEX… F9/79HEX
)
instead. This test mode allows testing of the IIR low
pass filter with any 24-bit input data.
Table 6. MAS6505 Trim and test register (FA/7AHEX) description
Bit
Bit
Description
Value
Function
Number
Name
7
SOSC
Selection for oscillator clock
0
Internal clock oscillator (default)
1
TD = input for external clock signal
6-3
STEST TEST pin signal selection
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
SDO = no test output (default)
SDO= output for internal OSC (on all the time)
SDO = output for OUT_SDM
SDO = output for internal band gap
SDO = output for EEPROM VREG voltage
SDO = output for EOC signal
SDO = output for EEPROM VREG OK
SDO = output for EEPROM chip enable
SDO = output for internal LVDD
SDO = PO, TD = NO, AFE output signals
SDO = no test output
SDO = input current sink for external chopper bias
SDO = input for external clock
SDO = input for external clock, internal input short
for sensor bridge noise measurement
SDO = no test output, internal input short for sensor
bridge noise measurement
SDO = no test output, internal temperature diode for
noise measurement
1110
1111
2-1
0
TRIM
Selects source of trim data
00
01, 10
11
0
1
All trim data from EEPROM (default)
Trimming mode (only OSC trim data from EEPROM)
Trim test mode (All trim data from registers)
Normal operation (default)
IIR filter test mode
SCALC Selection for input data source
of IIR filter
Note: To enable SDO pin operating as test pin set ENTP=1 in the Clock oscillator frequency trim register address FF/7FHEX
Note: If the SOSC=1 the external clock signal is selected and the internal oscillator is disabled independent of STEST
selection.
.
Note: External clock signal at either TD or SDO pin must not exceed VDD voltage.
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