DA6505.005
11 June 2018
EEPROM CONTROL REGISTER (ED/6DHEX
)
EEPROM control register (ED/6DHEX) has EON bits
for activating the EEPROM and EWE bits for
enabling the EEPROM for a write. See table 2. By
default the EEPROM is inactive (EON=000) and
write protected (EWE=00, EEPROM write disabled).
setting EWE=10. However the block write is intended
only for testing purposes. Warning: The EEPROM
block write should not be used since the given
data byte overwrites all EEPROM content
including the factory trimming values of the
EEPROM oscillator (BA/3AHEX) and internal clock
oscillator (BF/3FHEX). Any other EWE bit
combination keeps the EEPROM write disabled.
This write protection feature is for avoiding
accidental overwrite of the EEPROM calibration
data. To both read and write EEPROM content the
EEPROM control register should be set to value
To read or write EEPROM it needs to be first
activated by setting EON=010 or 101. Any other
EON bit combination keeps the EEPROM inactive.
Note that to minimize current consumption the
EEPROM should be activated only during EEPROM
read or write operations and kept inactive in other
time. This is because an internal regulator is turned
on when the EEPROM is active. To read only the
EEPROM content the EEPROM control register
should be set to value 02HEX or 05HEX prior read. After
activating the EEPROM and before starting to read
or write the EEPROM there need to be a startup time
wait of least 0.2 ms. See also chapter EEPROM
READ ONLY PROCEDURE.
0AHEX
.
See also chapter EEPROM WRITE
PROCEDURE.
The EEPROM control register contains also
EE_TEST bits which select different EEPROM test
modes. By default the EEPROM test mode is
disabled (EE_TEST=000). The EE_TEST bits
should be always kept at the default setting since
the other settings are only for EEPROM testing
purpose.
To write EEPROM it is necessary to additionally
enable the EEPROM for a write by setting EWE=01.
Alternatively EEPROM block write can be enabled by
Table 2. EEPROM control register (ED/6DHEX
)
Bit Number
Bit Name
Description
Value Function
7-5
EE_TEST
EEPROM test modes
000
001
010
011
100
101
110
111
00
01
10
11
000
010
101
other
EEPROM test mode disabled (default)
Charge pump verification, ETEST = VNEG
Charge pump verification, ETEST = VPOS
Oscillator verification, SDO = TCLK4M (Note 1)
Parallel endurance test
Read data retention test, NMART = 1 (Note 2)
Read data retention test, PMART = 1 (Note 3)
No test mode
EEPROM write disabled (default)
EEPROM normal write enabled
EEPROM block write enabled
EEPROM write disabled
4-3
2-0
EWE
EON
Enable EEPROM write
Activate EEPROM for
read or write
EEPROM inactive (default)
EEPROM activated
EEPROM activated
EEPROM inactive
Note 1. To get the EEPROM oscillator output TCLK4M from SDO pin, set the MSB bit ENTP = 1 in the Oscillator frequency
trim register (FF/7FHEX) and clear (00HEX) the Trim and test register (FA/7AHEX).
Note 2. VNEG margin voltage can be forced from ETEST pin
Note 3. VPOS margin voltage can be forced from ETEST pin
17 (44)
MAS [ MICRO ANALOG SYSTEMS ]
