DA6116.010
5 October, 2017
REGISTER DESCRIPTION
Register
Address Byte
Data Byte
7
6
5
4
3
2
1
0
msb…lsb
Function
Write Operation Status
CR6
X
X
X
1
0
1
0
R
X
X
Output code
00000000
00000001
00000010
00000011
Output code
00000000
00000001
00000010
00000011
Input code
11111111
11111110
Both channels ready
Right channel busy
Left channel busy
Both channels busy
Peak Detector Status
CR4
1
1
0
1
1
0
1
0
R
X
X
X
X
No overload
Right overload
Left overload
Both overload
DAC output, Note 1.
VREF(255)
Peak Detector
Reference
CR3
R/W
VREF(254)
11111101
VREF(253)
•
•
•
•
00000010
VREF(2)
00000001
00000000
Input code
11111111
11111110
VREF(1)
VREF(0)
Gain dB
+15.5
Left Channel Gain
CR2
X
1
1
0
1
R/W
X
X
+15.0
11111101
+14.5
•
•
•
•
11100000
00000010
00000001
00000000
Input code
11111111
11111110
0.0
-111.0
-111.5
Mute
Gain dB
+15.5
+15.0
Right Channel Gain
CR1
X
1
1
1
0
R/W
X
X
11111101
+14.5
•
•
•
•
11100000
00000010
00000001
00000000
0.0
-111.0
-111.5
Mute
Test Mode, CR5
Normal Write, Both
Instant Write, Left (CR2)
Instant Write, Right
(CR1)
X
X
X
X
1
1
0
0
1
0
1
1
1
0
0
1
1
1
1
0
R/W
W
W
X
X
X
X
X
X
X
X
Reserved
Write to both gain registers
Instant gain set to left channel
Instant gain set to right channel
W
Instant Write, Both
X
0
1
1
1
W
X
X
Instant gain set to both channels
Note 1. Reference voltage is calculated from VREF = (0.0036 + 0.0145 • CODE) • AVCC
Address byte bits:
•
•
•
Bit 2 is read/write bit (1=read, 0=write).
Bits marked as X are don’t care bits.
The instant write commands write values to CR1 and CR2 registers for right and left channels respectively. These values can be read by
using the specified read commands for CR1 and CR2 registers.
Data byte bits:
•
•
All registers are set to their default values 00HEX except CR3 which is set to FFHEX during power-on reset.
Default value for all bits is zero (00HEX).
8 (20)
MAS [ MICRO ANALOG SYSTEMS ]
