MV78100
Hardware Specifications
2.2.12
TDM Interface Pin Assignment
According to the pin multiplexing setting (see Table 20, MPP Function Summary, on
page 45), the power rails for the TDM pins can be VDDO_B or VDDO_C.
Note
Table 15: TDM Interface Pin Assignments
Pin Name
I/O
Pin
Type
Power
Rails
Description
TDM_INTn
I
CMOS
CMOS
CMOS
VDDO_B
or
VDDO_C
Interrupt input from the SLIC device
NOTE: Multiplexed on MPP.
TDM_RSTn
TDM_PCLK
O
VDDO_B
or
VDDO_C
SLIC reset input
Driven by the MV78100.
NOTE: Multiplexed on MPP.
I/O
VDDO_B
or
VDDO_C
PCM audio bit clock
Driven by the MV78100 if configured as PCLK master.
Input to MV78100 (driven by the SLIC device) if configured as
PCLK slave.
NOTE: Multiplexed on MPP.
TDM_FSYNC
I/O
CMOS
VDDO_B
or
VDDO_C
Frame Sync signal
Driven by the MV78100 if configured as FSYNC master.
Input to MV78100 (driven by the SLIC device) if configured as
FSYNC slave.
NOTE: Multiplexed on MPP.
TDM_DRX
TDM_DTX
I
CMOS
CMOS
CMOS
VDDO_B
or
VDDO_C
PCM audio input data
NOTE: Multiplexed on MPP.
O
O
VDDO_B
or
VDDO_C
PCM audio output data
NOTE: Multiplexed on MPP.
TDM0_RXQ
TDM1_RXQ
VDDO_B
or
VDDO_C
TDM channel0/1 Rx qualifier
Driven by MV78100 to the SLIC device. Useful when interfacing
with a SLIC device that does not support time slot multiplexing
(indicates the exact time slot in which the SLIC device should drive
PCM data on TDM_DRX).
NOTE: Multiplexed on MPP.
TDM0_TXQ
TDM1_TXQ
O
CMOS
VDDO_B
or
VDDO_C
TDM channel0/1 Tx qualifier
Driven by MV78100 to the SLIC device. Useful when interfacing
with a SLIC device that does not support time slot multiplexing
(indicates the exact time slot in which the SLIC device should
sample PCM data on TDM_DTX).
NOTE: Multiplexed on MPP.
MV-S104552-U0 Rev. D
Page 36
Copyright © 2008 Marvell
Document Classification: Proprietary Information
December 6, 2008, Preliminary
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
