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88EM8010XX-SAG2C000-XXXX 参数 Datasheet PDF下载

88EM8010XX-SAG2C000-XXXX图片预览
型号: 88EM8010XX-SAG2C000-XXXX
PDF下载: 下载PDF文件 查看货源
内容描述: 功率因数校正控制器 [Power Factor Correction Controller]
分类和应用: 功率因数校正光电二极管控制器
文件页数/大小: 42 页 / 412 K
品牌: MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
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88EM8010/88EM8011  
Datasheet  
Figure 21: Input Voltage Resistor Divider Layout Guidelines  
Ra  
SW  
ISNS  
VIN  
PGND  
SGND  
88EM8010/  
8011  
Rb  
Rc Cc  
VDD  
FB  
Keep layout of Rb, Rc and Cc as  
close as possible to Vin pin to  
have high noise immunity  
5.2  
Voltage Loop & Output Voltage Feedback on FB Pin  
The 88EM8010/88EM8011 IC integrates the voltage loop into digital DSP core. This internal voltage  
loop has the lower corner frequency for the PFC requirement. The FB pin is the internal voltage loop  
feedback signal input. The voltage reference of the IC is 2.5V for the rated output voltage.  
It is well known that the front-end PFC with Boost topology has to maintain low enough bandwidth  
(less than 20Hz) in order to achieve a good sinusoidal current waveform and power factor under a  
wide input voltage and load condition. In order to achieve a good sinusoidal current waveform and  
power factor, the voltage loop regulation coefficient should also be designed properly corresponding  
to the different input voltages. The adaptive voltage loop coefficient is designed inside the IC to  
select different voltage regulation parameters corresponding to the different input voltage. This  
achieves a much better power factor and sinusoidal current waveform compared to any of PFC  
power system on the market now.  
The design of RS1and RS2, as shown in Figure 22, is based on the rated output voltage and the  
power loss of the resistor divider. In order to keep low power consumption on the resistor divider and  
good signal to noise immunity, a total resistance of several Mis recommended for the pair of  
resistors RS1 and RS2. Because there is a 200kresistor inside of the IC between the FB pin to the  
SGND, the value of RS1 and RS2 is designed based on Equation (6) as:  
Vref Vref  
-------- --------  
V
out Vref  
-------------------------  
+
=
Equation (6)  
Rs2 R0  
Rs1  
Where Vref is 2.5V and R0 is 200k.  
Doc. No. MV-S104861-01 Rev. –  
Page 30  
Copyright © 2009 Marvell  
September 30, 2009, 2.00  
Document Classification: Proprietary